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Given a plot of a pink or white noise voltage, and a synchronized plot of the current induced in a partially reactive load -

Will the 'normalized' ratio of the FFT plots be an indication of Z?

I'm looking at the low frequency end of the FFT, to avoid sampling issues. By normalized, I mean that 1 volt would produce 1 amp with both plots resolving to 0dB at the minimum sampled frequency (the load being partially inductive in this example).

It seems much too simple......

RL

I've just begun using LTspice and don't seem to be able to discover how to
resize individual components.

What sort of "resize" are you referring to?

If you want to resize the schematic symbols, the size of each symbol is
fixed. You would have to create new symbols with different sizes. LTspice
includes a symbol editor.

Andy

I've just begun using LTspice and don't seem to be able to discover how to resize individual components.

hal8000b wrote:

Let me save you a lot a trouble. The domestic ring main is not a high speed

data circuit. If you take data at 1Mbps then 1 data bit is just 1 micro
second duration.
...

I have mixed feelings about this.

First, it is a homework assignment. She cannot "save herself the trouble"
by telling the teacher that the assignment was wrong because the method is
inferior to running brand new copper or fiber. Sometimes it is impractical
to do that and you need to work with what you have.

Note that the signal range is 90-150 kHz, so it is not very high speed and
the symbol rate can't be anything close to 1Mbps. It also isn't the "BPL"
that floods the power lines with 2-50 MHz, used for Internet access, and a
major source of interference.

Power line communications have been used for close to a century, by the
power utilities themselves to monitor their own circuits without having to
run additional wires. The signaling rate might be as low as 1 to 10bps
(bps, not Mbps). I'm sure the power companies understand the difficulty of
carrying data signals in a noisy environment.

I am puzzled about the choice of a matrix representation for the lines. It
seems to me that gives you two major hurdles: how to generate the matrices
for typical power lines, and how to use it in a simulator. It would be one
thing if you were handed the matrices and instructed to use them. If
instead all you have is a physical description of the lines and topologies,
then SPICE's standard transmission line element might be the best choice.

Be aware that some things in SPICE work nicely in the frequency domain (.ac
analysis) but not the time domain (.tran analysis) or vice-versa.
(Transmission line models work correctly in both.)

Regards,
Andy

I can't tell you how much I love LtSpice, or how much I have LEARNED about electronics in general since using LtSpice. I am shopping for a new laptop running full-blown Windows, not a tablet running Windows-8-RT. Does LtSpice support touch screen gestures such as pinch/expand or finger swipes to move the schematic / plot window around?

Even without touchscreen gesture support, LtSpice has the best user experience of any free Spice-simulator/schematic-capture/data-plotting tool that I have ever used.

Thank you from the bottom of my heart to Mike Englehardt, Helmut, Linear Technologies, the usergroup, and anybody else I forgot for this great FREE product and user experience!

Hutchtronix

--- In LTspice@..., "spencer_pace" <spencer_pace@...> wrote:

New to LTSpice; Trying to do a simple design to learn the program. Is there a way to plot parameters of the FET? Ex., overdrive voltage (need Vth)? How might I print out the gate parasitic capacitance and plot this vs the overdrive voltage?

Even better, does anyone have an example of a design using gm/Id method in LTSpice? I expect this question has been asked many times, but I cannot find an answer from my searches.

Thanks,
Spencer

Hello Spencer,

You should search in the Files-directory for "gm".

Files > Tables of Contents > all_fies.htm


Best regards,
Helmut

New to LTSpice; Trying to do a simple design to learn the program. Is there a way to plot parameters of the FET? Ex., overdrive voltage (need Vth)? How might I print out the gate parasitic capacitance and plot this vs the overdrive voltage?

Even better, does anyone have an example of a design using gm/Id method in LTSpice? I expect this question has been asked many times, but I cannot find an answer from my searches.

Thanks,
Spencer

Many Thanks Helmut !

罢辞耻蹿颈办é


Le 28/07/2013 15:36, Helmut a écrit :

--- In LTspice@... <mailto:LTspice%40yahoogroups.com>,
罢辞耻蹿颈办é HENNI-CHEBRA <henni.chebra@...> wrote:

Hi,

Where can I download the triode 845 model for LTSpice please ?

Best regards


罢辞耻蹿颈办é HENNI-CHEBRA

Hello 罢辞耻蹿颈办é,

Files > Lib > Tubes_Valves > Rydel_tubes.lib


It looks like it's the same model as in this file.

Files > Lib > Tubes_Valves > Excem > lampes_lt.lib


Best regards,
Helmut

[Non-text portions of this message have been removed]

--- In LTspice@..., 罢辞耻蹿颈办é HENNI-CHEBRA <henni.chebra@...> wrote:

Hi,

Where can I download the triode 845 model for LTSpice please ?

Best regards


罢辞耻蹿颈办é HENNI-CHEBRA

Hello 罢辞耻蹿颈办é,

Files > Lib > Tubes_Valves > Rydel_tubes.lib


It looks like it's the same model as in this file.

Files > Lib > Tubes_Valves > Excem > lampes_lt.lib


Best regards,
Helmut

Hi,

Where can I download the triode 845 model for LTSpice please ?

Best regards


Toufik HENNI-CHEBRA

--- In LTspice@..., John Woodgate <jmw@...> wrote:

The mention of POP/PSS analysis calls to mind a tool for detecting
electrolytic capacitors connected the wrong way round.

Hey, watch it - my recent development project has resembled that
remark on one or two occasions. POP! PSS-sssssss..., indeed!

with sine generator - not work.
need add to Source DC Offset +1.25V -- why?

Is it possible your circuit has only a + supply voltage?

Without a negative supply (which is one way of using the amp), it can't
handle negative voltages, which includes a sine wave with zero offset.

Andy

For example if you really meant
a PWM there are a lot example of PWM in this groups files.

It occurs to me ... there is every possibility that someone who needs to
use an Arduino computer to generate a stream of pulses, may not even know
what a PWM means.

Andy

In message <1374948801.96315.YahooMailNeo@...>, dated Sat, 27 Jul 2013, Ron Liff <ron_liff@...> writes:

I would add my voice to yours in hoping Mike pursues this addition to LTSpice. The existing FRA's, with their distortion problems and extensive times to complete, make their use toturously slow and inexact. Any and all improvements would be absolutely welcomed.

This message was also flagged as spam, and the link to fix it was incorrect as well. I guess Yahoo made some 'improvements'.

The mention of POP/PSS analysis calls to mind a tool for detecting electrolytic capacitors connected the wrong way round.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK

The phrase "Arduino Pulser" looks like a name you made up. If you tell
us what an "Arduio Pulser" does we may be able recommend one of the
simulations kept in this groups files. For example if you really meant
a PWM there are a lot example of PWM in this groups files.

Howard

In message <1374947911.55786.YahooMailNeo@...>,
dated Sat, 27 Jul 2013, Ron Liff <ron_liff@...> writes:

The problem is not the warning, the problem is that it is a path
problem that is unspecified, which is one of the many failings of all
of the common malware detectors in use by the public. Its a bit like
issuing a city wide warning about a criminal in the city. The malware
you detect can be anywhere, (any server port of the many in a path),
and your path is different from almost everyone elses.

You mean that the malware might be injected anywhere along the route.
So, it would go to some list members and not others, with a totally
unpredictable split.

?
- With that caveat, any and all malware alerts should be at least
flagged.
?

Noted.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK

Thanks, that's helpful. But I guess there's no way to have it retrieve the plot settings file automatically.

Cheers
Bob

analog,
?
I would add my voice to yours in hoping Mike pursues this addition to LTSpice. The existing FRA's, with their distortion problems and extensive times to complete, make their use toturously slow and inexact. Any and all improvements would be absolutely welcomed.
?
- Cordially - RC


________________________________
From: analogspiceman <analogspiceman@...>
To: LTspice@...
Sent: Saturday, July 27, 2013 7:29 AM
Subject: [LTspice] Re: Time domain based frequency response analysis

?

--- In mailto:LTspice%40yahoogroups.com, analogspiceman wrote:

Frank Wiedmann alerted me to a thread on the Designers-Guide.org
circuit simulation forum where a user was trying to use SIMPLIS to
obtain the frequency response of a boost converter. Frank asked
me to comment about the "folded" shape of the SIMPLIS generated
loopgain that was not expected by the original poster. In the
thread I have uploaded analysis results for the same circuit
simulated in LTspice.

I also have downloaded the node-limited free trial version of
SIMPLIS and have compared its abilities to LTspice. SIMPLIS is
amazingly powerful and very impressive. I hope Mike takes notice
and adds some similar capabilities and features to LTspice. See:

A lot of simulators have added POP/PSS (Periodic Operating Point/
Periodic Steady-State) solvers to their repertoire. Micro-Cap
recently added POP capability. They discuss it here:



Notice the effect it has on the resolution of the FFT example.

Many other simulators take this further with the addition of a
time domain based fast running FRA (Frequency Response Analyzer)
capability (SIMPLIS, PSIM and NL5 come to mind, but there are
others as well). This capability allows the simulator to directly
produce Bode plots and loop gain analyses for switched circuits
such as switched-mode power supplies (a very good feature, IMO).

The application of small-signal frequency-domain analysis to
switching piecewise-linear systems presents tremendous challenges.
Some years ago I made a FRA completely within LTspice using its
special a-devices (still available in our group files section).
About that time, Mike added some FRA examples to LTspice that use
post processing (.meas statements) to complete the analysis and
plot the results. Mike writes about this at length in the FAQ
section of LTspice's Help file topic ("How to get a Bode Plot
from a SMPS"). He argues that it is not worth the trouble because
it is generally not needed in order to be able to compensate a
design using an LTC IC because most of them use current mode
control.

Both of the above LTspice FRA approaches (mine and Mike's) are
painfully slow and suffer numerical dynamic range noise problems.
SIMPLIS (which has a free, but node limited demo) will solve for
the frequency response and/or loop gain of SMPS circuits with no
noise issues and will run the complete response analysis within a
few minutes (LTspice might take hours to do the same thing).

Here is link to a paper in which a basic buck stage is simulated
with SIMPLIS. The schematic is on page 16 and the SIMPLIS output
is shown on the next page (out to several times the switching
frequency).



The results shown look very clean with just the right sort of loop
response as expected for the extended frequency range simulated.
In the past, I have measured SMPS loops with an HP4194A loop gain
analyzer. The lab measurements look just like the SIMPLIS results.
I have also used the Ridley AP analyzer, but it is not quite as
accurate as the HP4194A. I have been told that the Venable analyzer
produces very good results as well (perhaps the best of all).

SIMPLIS type simulators are very fast in part because they approx-
imate all the nonlinear switched devices (diode, MOSFETs, etc.)
with line segment approximations through the switch transition
(some allow the number of segments used to be specified). Part of
their speed comes from the use of the POP/PSS analysis to quickly
find the operating point. I think a large part of their speed
also comes from having a native frequency response analyzer device
directly built into the simulator code.

LTspice already has a lot of these types of capabilities (ideal
diodes and switches with smooth transitions), POP/PSS sensing (but
no accelerator to get there). It has fast state transition sensing
devices (the digital a-devices). Personally, I would like to see
Mike add a native FRA device to LTspice so that it could generate
Bode plot loop-gain curves for switched mode products. It would
not be necessary to be as fast as SIMPLIS because LTspice does not
use the less accurate line segment approximations, but noise free
results would be a must. Run times of one third to one tenth the
speed of SIMPLIS (or the others) would be okay.

There are lots of tricks Mike could use to speed up the analysis.
For example, the Venable analyzer looks at phase change rate to
dynamically adjust the spacing of the frequency measurement points.

For LTC current mode ICs, all this may not be necessary, but for
general SMPS design there are many cases in which second order
effects dominate the loop response (series ESR in capacitors,
parallel loss in inductors, variable operating point dependent
delays in opto-isolator devices, etc.). In cases like these, or
when using non standard control methods, depending on averaged
models and standard concepts may lead to false conclusions and
bad choices in compensation design. A time domain FRA capability
in an excellent general purpose simulator such as is LTspice would
allow the designer better insight into the circuit and would be a
big plus to its feature set.

[Non-text portions of this message have been removed]

John,
The problem is not the warning, the problem is that it is a path problem that is unspecified, which is one of the many failings of all of the common malware detectors in use by the public. Its a bit like issuing a city wide warning about a criminal in the city. The malware you detect can be anywhere, (any server port of the many in a path), and your path is different from almost everyone elses.
?
- With that caveat, any and all malware alerts should be at least flagged.
?
- Coedially - RC


________________________________
From: John Woodgate <jmw@...>
To: LTspice@...
Sent: Saturday, July 27, 2013 10:33 AM
Subject: Re: [LTspice] Re: Time domain based frequency response analysis

?

In message <mailto:kt0qcf%2Baf18%40eGroups.com>, dated Sat, 27 Jul 2013,
analogspiceman <mailto:analogspiceman%40yahoo.com> writes:

John, perhaps you meant well, but it is irresponsible of you to smear
this website without first doing some basic substantiating research to
support what in all likelihood was a false alarm that AVG generated.

I strongly disagree. When malware is reliably flagged on mailing list
posts, the FIRST thing to do is to warn. If the warning is not
substantiated. little harm is done compared with what would occur if it
was substantiated.

Do I believe you or AVG, which is one of the most reputable Internet
security providers?

After looking a bit on the web I could find nothing to support your
warnings about what by all indications is a perfectly safe technical
website/forum.

Suppose the malware had been hacked in a few minutes before it was
flagged to me by AVG? Would your test sites have caught up?

What I did find directly contradicts your scare message.

I deny that it's a scare message.

Incidentally, your messages today are being flagged by Yahoo as spam. I
just thought you'd like to know that.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK

--- In LTspice@..., legg@... wrote:

A TEK scope plot of two waveforms, exported as a single CSV file.
Do you simply strip them, to separate columns and process as two PWL files?

Recall doing it before, a few years ago, but damned if I can recall how.

RL

"Separate" is the correct answer. Once you process the CSV to column data, rather than comma-separated, use a text editor that can do column mode, like UltraEdit (which is the one I use)...

Make two copies of the file, then, in column mode delete the appropriate column from each such that you have two files, columns of time and only one of data.

(Trivia comment... IBIS modeling supports multi-data columns.)

-Jim Thompson