Re: Time domain based frequency response analysis
In message <kt0qcf+af18@...>, dated Sat, 27 Jul 2013, analogspiceman <analogspiceman@...> writes: John, perhaps you meant well, but it is irresponsible of you to smear this website without first doing some basic substantiating research to support what in all likelihood was a false alarm that AVG generated. I strongly disagree. When malware is reliably flagged on mailing list posts, the FIRST thing to do is to warn. If the warning is not substantiated. little harm is done compared with what would occur if it was substantiated. Do I believe you or AVG, which is one of the most reputable Internet security providers? After looking a bit on the web I could find nothing to support your warnings about what by all indications is a perfectly safe technical website/forum.
Suppose the malware had been hacked in a few minutes before it was flagged to me by AVG? Would your test sites have caught up? What I did find directly contradicts your scare message. I deny that it's a scare message. Incidentally, your messages today are being flagged by Yahoo as spam. I just thought you'd like to know that. -- OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk Why is the stapler always empty just when you want it? John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK
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Re: LTspice World Tour in Australia
By the way, the sponsor is not Linear Technology.
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Re: LTspice World Tour in Australia
This has been asked before, but it would be great if some of these events could be recorded and put on youtube or dailymotion or similar.
They are typically about 6 hours long. The events are sponsored, and I'm sure the sponsors want you to come in person. Recording it could be a disincentive. Maybe they could be convinced to post a recording online 6 months after the tour has ended. Wasn't the slideshow made available from one of the tours, a few years back? Mike's seminars are very hands-on (by him) so the slideshow alone doesn't cover 80% of it. Andy
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Re: Convert model PSpice to LTSpice ??
When I fixed the voltages and edge rates, the simulation worked fine for me.
Andy
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Can anyone tell me where to find a schematic for the arduino pulser.
Are you looking for a particular circuit to interface the arduino with other stuff? It appears you might be looking for the circuit that has an opto-isolator and a power FET. This forum isn't for finding random schematics. Use Google for that. Contact people who have built Arduino pulsers. Once you have the circuit, you can most likely simulate it in LTspice (not simulating the Arduino itself, of course). Andy
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Re: Convert model PSpice to LTSpice ??
Did you fix the power supply voltages, the input amplitude, and the edge rate? yes, allready
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Also i need to find a potiometer spice and symbol that works.
Also check the group messages from the last 48 hours. Andy
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Re: Convert model PSpice to LTSpice ??
above 10 nS step not working!!!
Did you fix the power supply voltages, the input amplitude, and the edge rate?
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Re: LTspice World Tour in Australia
--- In LTspice@..., "Helmut" <helmutsennewald@...> wrote: Hello,
I want only remind that Mike is on tour in Australia this week.
Best regards, Helmut
This has been asked before, but it would be great if some of these events could be recorded and put on youtube or dailymotion or similar.
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Re: Convert model PSpice to LTSpice ??
Thanks Helmut!!
I insert this param in my modelling
.options cshunt=1e-16 .options ptrantau=.1u .tran 0 7ms 5ms 10ns
above 10 nS step not working!!!
i sad (((((( modelling very slowly
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Re: Time domain based frequency response analysis
--- In LTspice@..., John Woodgate <jmw@...> wrote: AVG reported a 'Java obfuscation' malware threat on that page. John, perhaps you meant well, but it is irresponsible of you to smear this website without first doing some basic substantiating research to support what in all likelihood was a false alarm that AVG generated. After looking a bit on the web I could find nothing to support your warnings about what by all indications is a perfectly safe technical website/forum. What I did find directly contradicts your scare message. For example, these services give Designers- Guide.org a completely SAFE rating: Please be more careful in future. -- a.s.
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Re: Time domain based frequency response analysis
In message <kt0lfh+f4cd@...>, dated Sat, 27 Jul 2013, analogspiceman <analogspiceman@...> writes: I also have downloaded the node-limited free trial version of SIMPLIS and have compared its abilities to LTspice. SIMPLIS is amazingly powerful and very impressive. I hope Mike takes notice and adds some similar capabilities and features to LTspice. See: AVG reported a 'Java obfuscation' malware threat on that page. -- OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk Why is the stapler always empty just when you want it? John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK
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Re: Time domain based frequency response analysis
--- In LTspice@..., analogspiceman wrote: Frank Wiedmann alerted me to a thread on the Designers-Guide.org circuit simulation forum where a user was trying to use SIMPLIS to obtain the frequency response of a boost converter. Frank asked me to comment about the "folded" shape of the SIMPLIS generated loopgain that was not expected by the original poster. In the thread I have uploaded analysis results for the same circuit simulated in LTspice. I also have downloaded the node-limited free trial version of SIMPLIS and have compared its abilities to LTspice. SIMPLIS is amazingly powerful and very impressive. I hope Mike takes notice and adds some similar capabilities and features to LTspice. See: A lot of simulators have added POP/PSS (Periodic Operating Point/ Periodic Steady-State) solvers to their repertoire. Micro-Cap recently added POP capability. They discuss it here:
Notice the effect it has on the resolution of the FFT example.
Many other simulators take this further with the addition of a time domain based fast running FRA (Frequency Response Analyzer) capability (SIMPLIS, PSIM and NL5 come to mind, but there are others as well). This capability allows the simulator to directly produce Bode plots and loop gain analyses for switched circuits such as switched-mode power supplies (a very good feature, IMO).
The application of small-signal frequency-domain analysis to switching piecewise-linear systems presents tremendous challenges. Some years ago I made a FRA completely within LTspice using its special a-devices (still available in our group files section). About that time, Mike added some FRA examples to LTspice that use post processing (.meas statements) to complete the analysis and plot the results. Mike writes about this at length in the FAQ section of LTspice's Help file topic ("How to get a Bode Plot from a SMPS"). He argues that it is not worth the trouble because it is generally not needed in order to be able to compensate a design using an LTC IC because most of them use current mode control.
Both of the above LTspice FRA approaches (mine and Mike's) are painfully slow and suffer numerical dynamic range noise problems. SIMPLIS (which has a free, but node limited demo) will solve for the frequency response and/or loop gain of SMPS circuits with no noise issues and will run the complete response analysis within a few minutes (LTspice might take hours to do the same thing).
Here is link to a paper in which a basic buck stage is simulated with SIMPLIS. The schematic is on page 16 and the SIMPLIS output is shown on the next page (out to several times the switching frequency).
The results shown look very clean with just the right sort of loop response as expected for the extended frequency range simulated. In the past, I have measured SMPS loops with an HP4194A loop gain analyzer. The lab measurements look just like the SIMPLIS results. I have also used the Ridley AP analyzer, but it is not quite as accurate as the HP4194A. I have been told that the Venable analyzer produces very good results as well (perhaps the best of all).
SIMPLIS type simulators are very fast in part because they approx- imate all the nonlinear switched devices (diode, MOSFETs, etc.) with line segment approximations through the switch transition (some allow the number of segments used to be specified). Part of their speed comes from the use of the POP/PSS analysis to quickly find the operating point. I think a large part of their speed also comes from having a native frequency response analyzer device directly built into the simulator code.
LTspice already has a lot of these types of capabilities (ideal diodes and switches with smooth transitions), POP/PSS sensing (but no accelerator to get there). It has fast state transition sensing devices (the digital a-devices). Personally, I would like to see Mike add a native FRA device to LTspice so that it could generate Bode plot loop-gain curves for switched mode products. It would not be necessary to be as fast as SIMPLIS because LTspice does not use the less accurate line segment approximations, but noise free results would be a must. Run times of one third to one tenth the speed of SIMPLIS (or the others) would be okay.
There are lots of tricks Mike could use to speed up the analysis. For example, the Venable analyzer looks at phase change rate to dynamically adjust the spacing of the frequency measurement points.
For LTC current mode ICs, all this may not be necessary, but for general SMPS design there are many cases in which second order effects dominate the loop response (series ESR in capacitors, parallel loss in inductors, variable operating point dependent delays in opto-isolator devices, etc.). In cases like these, or when using non standard control methods, depending on averaged models and standard concepts may lead to false conclusions and bad choices in compensation design. A time domain FRA capability in an excellent general purpose simulator such as is LTspice would allow the designer better insight into the circuit and would be a big plus to its feature set.
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Re: CSV to PWL - two synchronized waveforms
--- In LTspice@..., legg@... wrote: A TEK scope plot of two waveforms, exported as a single CSV file. Do you simply strip them, to separate columns and process as two PWL files?
Recall doing it before, a few years ago, but damned if I can recall how.
RL
There was a title row....That's fixed. Negative time? I'll just bodge it with a formula row. RL
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CSV to PWL - two synchronized waveforms
A TEK scope plot of two waveforms, exported as a single CSV file. Do you simply strip them, to separate columns and process as two PWL files?
Recall doing it before, a few years ago, but damned if I can recall how.
RL
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LTC3765 & 66 dc/dc circuit
Hello!
I tried to simulate a +9...+30 Vin, +3.5...+4.2 Vout dc/dc converter using LTC3765 & 66 chips. While it simulates nice using default LT settings as in jigs directory, any attempt to use lower input voltage in the area +9..12 Vin failed due to abnormal Ndrv pin behaviour. After several milliseconds of proper work it simply stops feeding Vcc pin through mosfet.
Why it makes this "brownout" ?
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--- In LTspice@..., "cory991" <cory991@...> wrote: Can anyone tell me where to find a schematic for the arduino pulser. Also i need to find a potiometer spice and symbol that works.
Thanks
I'm not really sure if LTspice would be the best program for you. Arduino is a programmable microcontroller and requires programming before it will do anything. Search on google for "fritzing". Fritzing is a breadboard and pcb program with Arduino templates. If you look through the files and examples and index on this site you will find a potentiometer model and symbol created by our moderator that works.
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Re: abcd for cable modeling
--- In LTspice@..., "desi2209" <desi0985@...> wrote: i'm working with power line communication systems. The articles explain the trasmission line theory for cable modelling, but then start to talk about abcd matrix and the advantage to describe the cable with this element, because on power line cable there are several branches and a complex topology to describe and the abcd matrix permitts to evaluate the total transfer function simply with matrix multiplications.
What i need is a way to define different elements of the line (segment of cable, different types of branches) in order to have a database to use to display the desired network topology and analyze the signal behaviour through the line.
Let me save you a lot a trouble. The domestic ring main is not a high speed data circuit. If you take data at 1Mbps then 1 data bit is just 1 micro second duration. This is very short compared to any electrical spikes, surges, or noise on a domestic ring main. It's also the reason why powerlines are inferior to ethernet or wireless. I've seen very poor and erratic throughputs on power line adapters always ending up loosing be50 and 90% of the original speed. Don't let this put you off, but you will need to explain in your simulation how the power line overcomes data dropouts, e.g. 25ms contact bounce from a switch and even longer noise periods from heavy loads like kettles or devices containing motors.
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Can anyone tell me where to find a schematic for the arduino pulser. Also i need to find a potiometer spice and symbol that works.
Thanks
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Re: Convert model PSpice to LTSpice ??
His model seems to run OK (on my computer) as long as it stays below slew-rate limiting.
As soon as the output slew rate hits +/-10V/us and starts flattening out, that's when it starts getting the "time step too small" errors.
Andy
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