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Re: OT/Left Field...

 


I would love an Android version of LTspice
...
As you may know, Mike Engelhardt has said before that LTspice isn't going
to be ported to another platform or OS. That would be a major undertaking.

If there exists anything similar to Wine for Linux that would allow
Microsoft Windows programs to run on a tablet, however unlikely, that would
be the easiest way to get LTspice itself running there.

The problem I see with these new hardware platforms, is that they are so
transient. What do you suppose their lifetime is? That fact alone makes
porting a major project like LTspice, not worth the effort.

There are a number of freeware and/or source-code-available programs out
there, to do electronic circuit simulation, in addition to those in the
Wikipedia article. But alas they aren't LTspice.

Andy


Re: 74F and 74ACT models

 


Does anybody know where it is possible to get some models of 74F and 74ACT
units?
At one time, T.I. and National Semi (which is now T.I.) had SPICE models
for them.

In a university project I should simulate and analyse the frequency
spectrum and the cross talk characteristics by using these elements.
If you mean crosstalk within a device (multiple elements of the same IC),
that could be a problem, unless their models are that detailed. Most SPICE
models are not.

If you mean crosstalk in traces on your board, you can do that.

Andy


Re: arbitrary solar cell model

 

Hello Hamed,

While I would also advise you to use a standard diode model instead of building your own, I may be able to shed some light on your difficulty.

Note that your derived values for ISC and VOC are generated in relation to the reference input 'ref'. However when you use these values in your formulae you are using the value relative to ground:

log((v(isc)/{i0})+1)

The same is true when you use the input voltage:

(v(inp)*iscr)/1000)

I have not tried to run your circuit, but I strongly suspect this is why it would work for a single cell where ref = ground and not for a second cell where ref != ground.

I think the most sensible fix would be to reference eisc and evoc to ground instead of ref, so you can observe the values externally if you want and not have to subtract the ref voltage. Then change "v(inp)" for example to "v(inp,ref)" where needed.

I suggest that if you had drawn this as a circuit instead of writing a netlist these issues would have been quickly apparent, but maybe not.

Cheers,
Fred

--- In LTspice@..., "hamed" <l0st_l0rd@...> wrote:

Dear friends

in the file below you can find an arbitrary solar cell.
When I put two cells in parallel the answer is correct and when I put them in
series I see a distortion.
I think the problem is related to the diode behavioral model.

I will be thankful if any of you could help me.



sincerely,
Hamed


locking the graph vertical axis

 

Having used LTSPICE for some years now, I never satisfactorily solved this issue:

I have some circuits that have essentially 0 gain, plotted on dB scales - I get 100's of dB on the vertical axis.

I can adjust the axis to display a meaningful range, but every time you run the simulator the scale is autoranged again. Clicking the tick box 'autorange' to not autorange is not effective here - every run get autoranged just the same.

Is there any way of locking the y axis to the entered values - I' sure I must just be missing something....and yes I read the documentation as best as I could...

Kevin.
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Re: inductance with a permeability in dependency of frequency

 

I sometimes use a 'linear' representation of inductors to speed analyses.

Try a ladder network of linear inductors and resistors.

Just like in fitlering, you have to change the first and last components, sometimes the middle - think in terms of Tchebyschev(sp?) coefficients and you'll get the picture

*IF* you do that, it only takes somethinge like 5 to 7 terms (note the odd numbers) to pretty accurately match the performance of chip ferrite beads. As you know, chip ferrite beads start out a little inductive and then turn resistive, but as the impedance goes higher with increasing frequency the impedance angle seems to maintain the same angle, almost like eddy current losses.

The point is, using the array form of entering values and with a little bit of thinking; you can create subckts that match spec within about 1-5% over the spectrum, yet use LINEAR components - speeding up analyses to way faster than using the LaPlace equation form. which is the usual models given for these chips.



--- alzie@... wrote:

From: alzie <alzie@...>
To: LTspice@...
Subject: Re: [LTspice] Re: inductance with a permeability in dependency of frequency
Date: Tue, 09 Jul 2013 09:48:53 -0400


Re: inductance with a permeability in dependency of frequency

 

Hi Herbert


On 07/09/2013 12:45 AM, sawreyrw wrote:
dows anybody have an idea for modelling a inductance with a
permeability in dependency of frequency ??

A simple model would be an inductor in parallel with a resistor.

Most ferrous cores behave well up to a cross over frequency at which
the perm drops and they become very lossy.
The loss dominates above that freq and
the inductor looks pretty much like a resistor that
is flat with freq.



--


AC2CL

I do not think there is any thrill that
can go through the human heart like that felt by the inventor as
he sees some creation of the brain unfolding to success...
Such emotions make a man forget food, sleep, friends, love, everything.

- Nikola Tesla


Re: arbitrary solar cell model

 

--- In LTspice@..., "Hhamed" <l0st_l0rd@...> wrote:

The fact is that here I cannot use the standard diode model while
it is temperature dependent diode so I should mention the diode
property.
Did you know that a particular instance of a diode may have its
temperature set independently of the general circuit simulation
temperature such that the diode temperature remains fixed while
the temperature of the other devices are varied?

D1 1 0 cell n={n} m={m} temp=50 ; diode temp fixed at 50 deg C

But, by all means, if you wish, please do carry on with banging
your head against your wall of overly complicated netlists and
questionably reinvented diode equations.


Re: arbitrary solar cell model

 

Thank you very much dear friend( you did not mention your name)

The fact is that here I cannot use the standard diode model while it is temperature dependent diode so I should mention the diode property.

the point is that I should not see the distortion there but I see ! and I don't know where is the problem !
I also tried these formula in the circuit :

gidiode internode ref value={i0*(exp(v(internode)/({vt}*(v(tcell)+273)))-1)}

but the strange thing is that the by increasing the temperature, the open circuit voltage will increase which shouldn't be !!!

Thanks for your answer
regards
Hamed

--- In LTspice@..., "analogspiceman" <analogspiceman@...> wrote:

--- In LTspice@..., "Hamed" <l0st_l0rd@> wrote:

Thanks friends for your responses but the point is that
converting this circuit to schematics will make it more
confusing. Actually the output should not have the distortion
in -1.8kA! and it should continue constant like a diode :)
Is there some reason you model must be so complicated and do you
really need to reinvent the diode model? Couldn't you do something
like the following and put all us, your fellow group members and
involuntary consumers of SPAM, out of our collective misery?

[Or you could just feed us wafer-thin after-dinner mints...
Gurgle, burp... Nah, I couldn't eat another thing, I'm
absolutely stuffed! Now, SPAM off!]

* Simple yet effective PV Array model (typical values)
*
* Rp sets voltage slope of curve
* Rs sets current slope of curve
* Isc is short circuit current
* n = number of series cells
* m = number of parallel strings

.param Rp=1 Rs=3m Isc=10 n=60 m=1
I1 0 1 {Isc*m}
D1 1 0 cell n={n} m={m}
Rp 1 0 {Rp*n/m}
.model cell d Rs={Rs} Is=315n n=1.26 Cjo=50u Tnom=25 Trs1=10m Trs2=0m1


Re: arbitrary solar cell model

 

--- In LTspice@..., "Hamed" <l0st_l0rd@...> wrote:

Thanks friends for your responses but the point is that
converting this circuit to schematics will make it more
confusing. Actually the output should not have the distortion
in -1.8kA! and it should continue constant like a diode :)
Is there some reason you model must be so complicated and do you
really need to reinvent the diode model? Couldn't you do something
like the following and put all us, your fellow group members and
involuntary consumers of SPAM, out of our collective misery?

[Or you could just feed us wafer-thin after-dinner mints...
Gurgle, burp... Nah, I couldn't eat another thing, I'm
absolutely stuffed! Now, SPAM off!]

* Simple yet effective PV Array model (typical values)
*
* Rp sets voltage slope of curve
* Rs sets current slope of curve
* Isc is short circuit current
* n = number of series cells
* m = number of parallel strings

.param Rp=1 Rs=3m Isc=10 n=60 m=1
I1 0 1 {Isc*m}
D1 1 0 cell n={n} m={m}
Rp 1 0 {Rp*n/m}
.model cell d Rs={Rs} Is=315n n=1.26 Cjo=50u Tnom=25 Trs1=10m Trs2=0m1


Re: arbitrary solar cell model

John Woodgate
 

In message <krgsbq+nfo3@...>, dated Tue, 9 Jul 2013, hamed <l0st_l0rd@...> writes:

Thanks friends for your responses but the point is that converting this circuit to schematics will make it more confusing.
It couldn't possibly do so. If you want more help, please post the schematic.
--
OOO - Own Opinions Only. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK


Re: arbitrary solar cell model

 

Thanks friends for your responses but the point is that converting this circuit to schematics will make it more confusing.
actually the output should not have the distortion in -1.8kA ! and it should continue constant like a diode :)

kind regards
Hamed

--- In LTspice@..., John Woodgate <jmw@...> wrote:

In message <krg4eh+9gdc@...>, dated Tue, 9 Jul 2013, sawreyrw
<sawreyrw@...> writes:

No one is interested in a .cir file. If you want help, convert it to
an .asc file and post that to the Files>Temp folder of this group.
The file will run and 'Pick visible traces' allows output node voltages
to be plotted. Both outputs have serious problems, output 2 is stuck at
0 V but output 1 'blows up' to quasi-infinite voltage.

Some people can read netlists well, but I can't.
--
OOO - Own Opinions Only. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK


Re: .measure script

 

--- In LTspice@..., "mbuni78" <mbuniltd@...> wrote:

Seems there has been quite a bit written about the .meas command which makes it hard to find specific information in previous posts.

Several questions that may have been already answered in the past:

1) Is there an example .meas script posted in the "Files" section that I may have missed?
Files > Tut > MEASURE



2) If there is a syntax error in the .meas file, does the whole script fail or only that particular .meas command?
Only the commands which are wrong and of course the commands
needing results from wrong previous commands.

3) Can I parameterize within a .meas command? E.g. can
I parameterize the start and end times for an average function.
Yes.


.param mbegin=5us mend=20us
.meas Pout avg RLOAD6*I(R2)^2 from={mbegin} to={mend}

Also "from=" and "to=" does not seem to be documented in any ltspice help documentation. I had to grab it off hspice documentation.

Thanks.
Hello,

Please try the mentioned examples.

Best regards,
Helmut


Re: A TVS does not work with load dump test??

 

Hi.
You included TVS diode in parallel to the voltage source? Then, measure the diode current. If the source impedance is zero, the voltage limit is not.
Put your project in the TEMP folder.
Bordodynov.

09.07.2013, 14:38, "eqmqiq" <g9512728@...>:

I try to create a general RC circuit with LED which is usually designed for car lamp use. A TVS(SMBJ24CA) is used for protect from voltage spike(parallel with input). I input a load dump voltage waveform into the circuit, but the voltage is not clamped by TVS, does anybody know what the problem is??


A TVS does not work with load dump test??

 

I try to create a general RC circuit with LED which is usually designed for car lamp use. A TVS(SMBJ24CA) is used for protect from voltage spike(parallel with input). I input a load dump voltage waveform into the circuit, but the voltage is not clamped by TVS, does anybody know what the problem is??


74F and 74ACT models

 

Hy guys

Does anybody know where it is possible to get some models of 74F and 74ACT units?

I couldn't find anything in the group library.

In a university project I should simulate and analyse the frequency spectrum and the cross talk characteristics by using these elements.

In advance many thanks.

Regards

Misho


.measure script

 

Seems there has been quite a bit written about the .meas command which makes it hard to find specific information in previous posts.

Several questions that may have been already answered in the past:

1) Is there an example .meas script posted in the "Files" section that I may have missed?

2) If there is a syntax error in the .meas file, does the whole script fail or only that particular .meas command?

3) Can I parameterize within a .meas command? E.g. can I parameterize the start and end times for an average function.

.param mbegin=5us mend=20us
.meas Pout avg RLOAD6*I(R2)^2 from={mbegin} to={mend}

Also "from=" and "to=" does not seem to be documented in any ltspice help documentation. I had to grab it off hspice documentation.

Thanks.


Re: arbitrary solar cell model

John Woodgate
 

In message <krg4eh+9gdc@...>, dated Tue, 9 Jul 2013, sawreyrw <sawreyrw@...> writes:

No one is interested in a .cir file. If you want help, convert it to an .asc file and post that to the Files>Temp folder of this group.
The file will run and 'Pick visible traces' allows output node voltages to be plotted. Both outputs have serious problems, output 2 is stuck at 0 V but output 1 'blows up' to quasi-infinite voltage.

Some people can read netlists well, but I can't.
--
OOO - Own Opinions Only. See www.jmwa.demon.co.uk
Why is the stapler always empty just when you want it?

John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK


Re: Possible to snap to lowest or highest point of plot?

 

--- In LTspice@..., "uoficowboy" <nleahcim@...> wrote:

Hi - I have been characterizing a couple circuits and have
been manually trying to find the highest and lowest voltages
and currents of a circuit I'm simulation. I'd love it if
there was some sort of "snap" feature that would snap to
the highest or lowest point. Or, similarly, if I could just
get the highest/lowest points of waveforms to be displayed
on the schematic itself.

Does anything like this exist?

Thanks!!

Hello,

You could use the MEASURE functions. The results will be in the
log-file. View -> SPICE Error log

.meas peak1 MAX V(..) ....

There are many examples in the Files section.

Files > Tut > MEASURE



Best regards,
Helmut


Re: inductance with a permeability in dependency of frequency

 

--- In LTspice@..., "Herbert" <afu@...> wrote:

Hi there,

dows anybody have an idea for modelling a inductance with a permeability in dependency of frequency ??

I could not find anything in the messages ?!

Herbert
Herbert,

I'd like to help you, but I don't understand your question. What do you want to know?

Rick


Re: arbitrary solar cell model

 

--- In LTspice@..., "hamed" <l0st_l0rd@...> wrote:

Dear friends

in the file below you can find an arbitrary solar cell.
When I put two cells in parallel the answer is correct and when I put them in
series I see a distortion.
I think the problem is related to the diode behavioral model.

I will be thankful if any of you could help me.



sincerely,
Hamed
Hamed,

No one is interested in a .cir file. If you want help, convert it to an .asc file and post that to the Files>Temp folder of this group.

Rick