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Hi.
Model:

.SUBCKT q2SC5006_v111 7 8 9
Ccb 2 5 58f
Cce 2 6 87f
Cbe 7 9 0.67f
Cb 1 2 180f
Ce 2 3 180f
Lb 5 7 1.09n
Lc 2 8 0.79n
Le 6 9 0.99n
Lb2 1 5 0.004n
Le2 3 6 0.004n
Qnpn 2 1 3 q2SC5006_v111_M

.MODEL q2SC5006_v111_M NPN
+(IS=616e-18 BF=161 NF=0.99 VAF=50.0
+ IKF=1.5 BR=14.4 NR=0.99 VAR=2.4
+ IKR=0.32 ISE=38.2e-14 NE=2.19 ISC=80e-17
+ NC=1.0 RB=4.37 IRB=759e-6 RBM=2.23
+ RE=0.4 RC=5.0 CJE=2.21p VJE=0.954
+ MJE=0.408 CJC=1p VJC=0.667 MJC=0.408
+ XCJC=0.8
+ FC=0.50 TF=20.0e-12 XTF=1e-3 VTF=0.668
+ITF=9.7 TR=0 PTF=40 EG=1.11
+ XTI=3.0 XTB=0)
.ENDS q2SC5006_v111

Bordodynov.

10.07.2013, 08:20, "ferdiancahyodwiputro" <ferdiancahyodwiputro@...>:

dear everyone
i have toruble to design low noise amplifier.
i search transistor 2SC5006 in library LTspice but i can't found it.
please help me how to get transistor 2SC5006 in library LTspice

Everything said here is correct. The voltage source has precisely zero
output resistance, so it will sustain the driven voltage at whatever
current, no matter how hard the TVS tries to shunt it.

However, the other thing I find noteworthy is that your TVS is conducting
hundreds of amps even with the normal operating voltage (12.8V) when there
is no spike. I do not think you have set up its model parameters
correctly. Despite the fact that you have a TVS schematic symbol, the
parameters you gave it are for an ordinary silicon diode.

LTspice comes with two TVS diodes in its standard diode library. They use
different parameters than the ones you've specified.

Regards,
Andy

The voltage source is virtually ideal; it?has virtually no output impedance, so there is nothing across which to drop the voltage and it can supply virtually infinite current. The current through the TVS is limited by its own impedance. If you look at the current through the TVS, you will see that it is over 800 Amps. If you add some parasitic series resistance to the voltage source, like a real voltage source will have, you will see that the TVS does, indeed, clamp the voltage.
?
?? - Philip


________________________________
From: eqmqiq <g9512728@...>
To: LTspice@...
Sent: Tuesday, July 9, 2013 8:07 PM
Subject: [LTspice] Re: A TVS does not work with load dump test??



?

Hi, I have already put the file into TEMP folder, the file name is "TVS_clamp.asc", thanks a lot for your help!!

--- In mailto:LTspice%40yahoogroups.com, á???????? ?????????× <BordodunovAlex@...> wrote:

Hi.
You included TVS diode in parallel to the voltage source? Then, measure the diode current. If the source impedance is zero, the voltage limit is not.
Put your project in the TEMP folder.
Bordodynov.

09.07.2013, 14:38, "eqmqiq" <g9512728@...>:

I try to create a general RC circuit with LED which is usually designed for car lamp use. A TVS(SMBJ24CA) is used for protect from voltage spike(parallel with input). I input a load dump voltage waveform into the circuit, but the voltage is not clamped by TVS, does anybody know what the problem is??

[Non-text portions of this message have been removed]

Hi, I have already put the file into TEMP folder, the file name is "TVS_clamp.asc", thanks a lot for your help!!

--- In LTspice@..., "sawreyrw" <sawreyrw@...> wrote:

--- In LTspice@..., "Herbert" <afu@> wrote:

Hi there,

dows anybody have an idea for modelling a inductance with a permeability in dependency of frequency ??

I could not find anything in the messages ?!

Herbert

Herbert,

I'd like to help you, but I don't understand your question. What do you want to know?

Rick

The permeability of some magnetic core materials is highly frequency-dependent - a good example is the amorphous materials marketed as parts for common-mode chokes.

At common test frequencies, these may measure ten to 100 times their effective inductance when applied in the narrow-band conducted emissions frequency range (100KHz-1MHz), where the impedance is most critical.

RL

For the person who must run LTspice on a tablet there is the Microsoft
Surface Pro. See:
<>
For comparison a 128Gb Iipad price is $799.

Howard

...
converting this circuit to schematics will make it more confusing.

What made your netlist confusing to me, where a schematic would have
helped, is figuring out the interconnections between the subcircuits, and
between them and the other elements. Having nodes marked as "OUTPUT" that
are actually inputs to the subcircuit, does not help.

Your original note talked about both series and parallel connections, so I
expected to see both. Not seeing that, I had to do a bunch of tracing,
mentally re-constructing the missing schematic, to figure out whether this
was the series case or the parallel case.

So a schematic definitely would have helped. It would have made it less
confusing, not more.

actually the output should not have the distortion in -1.8kA ! and it

should continue constant like a diode :)

But you never described how this "distortion" manifests itself.
Specifically, what did LTspice calculate that differed from your hand
calculations of your formulas at the same operating point? (Indeed, did
you do any hand calculations at the point or points in question, that show
what the signal or signals ought to be?)

Saying that signals look funny is one thing. Saying that they are
incorrect requires some proof. You have not offered any proof that
LTspice's findings are incorrect. In doing that, I think that you would
probably find where the error is.

Regards.
Andy

--- In LTspice@..., "hamed" <l0st_l0rd@...> wrote:

Thanks friends for your responses but the point is that converting this circuit to schematics will make it more confusing.

Agree, but it is teditious to debug and/or examine a *.CIR file.

No one is interested in a .cir file. - as Rick sawreyrw said.
No one will do that job for you.

So if you cannot transform the *.CIR file to an *.ASC schematic you will not get much help!

hws

Hello. I once knew how to transfer the keyboard shortcuts from my desktop
to my laptop of LTspice. I have searched for it and found instructions that
say that a scad3.ini file is located in Windows, but that may be
old...there is not such file.

scad3.ini is now named LTspiceIV.ini. I believe its location is
$APPDATA$&#92;LTspiceIV.ini. The exact location of $APPDATA$ is dependent on
your version of Windows. On this computer, it defaults to
C:&#92;Users&#92;<username>&#92;AppData&#92;Roaming&#92;.

Regards,
Andy

Hello. I once knew how to transfer the keyboard shortcuts from my desktop to my laptop of LTspice. I have searched for it and found instructions that say that a scad3.ini file is located in Windows, but that may be old...there is not such file.

Does anyone know where the keyboard shortcuts are stored, so that I may simply copy them to my other computer?

Thanks for your help!

hamed <l0st_l0rd@...> wrote:

the reason that I use arbitrary model not a standard diode is that I cannot

control temperature change for each solar cell in diode model.

You can.

See the Help utility: LTspice IV > LTspice > Circuit Elements > D. Diode

Syntax: Dnnn anode cathode <model> [area] [off] [m=<val>] [n=<val>]
[temp=<value>]

See that last expression? That is the temperature you want that particular
diode instance to have. It overrides the global temperature setting. Each
diode can have its own temperature. (Didn't someone else in this thread
already say that?)

Regards,
Andy

Dear Fred

Thank you very much for your answer.
the reason that I use arbitrary model not a standard diode is that I cannot control temperature change for each solar cell in diode model.
Furthermore, the reason that grounds are different is that two cells are in series.
Actually I should say that I am not so good in schematics environment and I am used to netlists while I can control the nodes easier.
In this model by varying the temperature of each cell most of elements values will change and it is the reason that I cannot use the standard diode model.

Kind regards
Hamed

Sorry I mis-typed, you probably want to leave v(inp) alone (don't reference it to 'ref') but you do want to change v(internode) to v(internode,ref). There still seems to be some other problem, though, at temperatures other than 25. I don't have time to look any further right now.

--- In LTspice@..., "hamed" <l0st_l0rd@...> wrote:

[snip]
I also tried these formula in the circuit :

gidiode internode ref value={i0*(exp(v(internode)/({vt}*(v(tcell)+273)))-1)}

but the strange thing is that the by increasing the temperature, the open circuit voltage will increase which shouldn't be !!!

If you look at the standard diode formula I = Is * exp(qV/kT) it seems like the voltage -should- go up with increasing T, but that neglects the temperature dependence of Is, which is quite strong. If you don't model that then Voc will go up with temperature. Another reason to use the standard diode model.

-Fred

--- In LTspice@..., "qrx3" <fredh@...> wrote:

Hello Hamed,

While I would also advise you to use a standard diode model instead of building your own, I may be able to shed some light on your difficulty.

Note that your derived values for ISC and VOC are generated in relation to the reference input 'ref'. However when you use these values in your formulae you are using the value relative to ground:

log((v(isc)/{i0})+1)

The same is true when you use the input voltage:

(v(inp)*iscr)/1000)

I have not tried to run your circuit, but I strongly suspect this is why it would work for a single cell where ref = ground and not for a second cell where ref != ground.

I think the most sensible fix would be to reference eisc and evoc to ground instead of ref, so you can observe the values externally if you want and not have to subtract the ref voltage. Then change "v(inp)" for example to "v(inp,ref)" where needed.

I suggest that if you had drawn this as a circuit instead of writing a netlist these issues would have been quickly apparent, but maybe not.

Cheers,
Fred

--- In LTspice@..., "hamed" <l0st_l0rd@> wrote:

Dear friends

in the file below you can find an arbitrary solar cell.
When I put two cells in parallel the answer is correct and when I put them in
series I see a distortion.
I think the problem is related to the diode behavioral model.

I will be thankful if any of you could help me.



sincerely,
Hamed

I would love an Android version of LTspice
...

As you may know, Mike Engelhardt has said before that LTspice isn't going
to be ported to another platform or OS. That would be a major undertaking.

If there exists anything similar to Wine for Linux that would allow
Microsoft Windows programs to run on a tablet, however unlikely, that would
be the easiest way to get LTspice itself running there.

The problem I see with these new hardware platforms, is that they are so
transient. What do you suppose their lifetime is? That fact alone makes
porting a major project like LTspice, not worth the effort.

There are a number of freeware and/or source-code-available programs out
there, to do electronic circuit simulation, in addition to those in the
Wikipedia article. But alas they aren't LTspice.

Andy

Does anybody know where it is possible to get some models of 74F and 74ACT
units?

At one time, T.I. and National Semi (which is now T.I.) had SPICE models
for them.

In a university project I should simulate and analyse the frequency

spectrum and the cross talk characteristics by using these elements.

If you mean crosstalk within a device (multiple elements of the same IC),
that could be a problem, unless their models are that detailed. Most SPICE
models are not.

If you mean crosstalk in traces on your board, you can do that.

Andy

Hello Hamed,

While I would also advise you to use a standard diode model instead of building your own, I may be able to shed some light on your difficulty.

Note that your derived values for ISC and VOC are generated in relation to the reference input 'ref'. However when you use these values in your formulae you are using the value relative to ground:

log((v(isc)/{i0})+1)

The same is true when you use the input voltage:

(v(inp)*iscr)/1000)

I have not tried to run your circuit, but I strongly suspect this is why it would work for a single cell where ref = ground and not for a second cell where ref != ground.

I think the most sensible fix would be to reference eisc and evoc to ground instead of ref, so you can observe the values externally if you want and not have to subtract the ref voltage. Then change "v(inp)" for example to "v(inp,ref)" where needed.

I suggest that if you had drawn this as a circuit instead of writing a netlist these issues would have been quickly apparent, but maybe not.

Cheers,
Fred

Having used LTSPICE for some years now, I never satisfactorily solved this issue:

I have some circuits that have essentially 0 gain, plotted on dB scales - I get 100's of dB on the vertical axis.

I can adjust the axis to display a meaningful range, but every time you run the simulator the scale is autoranged again. Clicking the tick box 'autorange' to not autorange is not effective here - every run get autoranged just the same.

Is there any way of locking the y axis to the entered values - I' sure I must just be missing something....and yes I read the documentation as best as I could...

Kevin.
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I sometimes use a 'linear' representation of inductors to speed analyses.

Try a ladder network of linear inductors and resistors.

Just like in fitlering, you have to change the first and last components, sometimes the middle - think in terms of Tchebyschev(sp?) coefficients and you'll get the picture

*IF* you do that, it only takes somethinge like 5 to 7 terms (note the odd numbers) to pretty accurately match the performance of chip ferrite beads. As you know, chip ferrite beads start out a little inductive and then turn resistive, but as the impedance goes higher with increasing frequency the impedance angle seems to maintain the same angle, almost like eddy current losses.

The point is, using the array form of entering values and with a little bit of thinking; you can create subckts that match spec within about 1-5% over the spectrum, yet use LINEAR components - speeding up analyses to way faster than using the LaPlace equation form. which is the usual models given for these chips.



--- alzie@... wrote:

From: alzie <alzie@...>
To: LTspice@...
Subject: Re: [LTspice] Re: inductance with a permeability in dependency of frequency
Date: Tue, 09 Jul 2013 09:48:53 -0400

Hi Herbert


On 07/09/2013 12:45 AM, sawreyrw wrote:

dows anybody have an idea for modelling a inductance with a
permeability in dependency of frequency ??

A simple model would be an inductor in parallel with a resistor.

Most ferrous cores behave well up to a cross over frequency at which
the perm drops and they become very lossy.
The loss dominates above that freq and
the inductor looks pretty much like a resistor that
is flat with freq.



--


AC2CL

I do not think there is any thrill that
can go through the human heart like that felt by the inventor as
he sees some creation of the brain unfolding to success...
Such emotions make a man forget food, sleep, friends, love, everything.

- Nikola Tesla