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Locked Re: Design a DC DC converter using NE555

 

On Tue, Apr 8, 2025 at 10:08 PM, <otherappuser@...> wrote:

A dc-dc converter which has to supply an output voltage of 5 V with the output power from 2.5 W to 25 W. ...

Is that a homework assignment?

Please note that this group does not condone solving homework assignments for students who are too lazy to do the work yourself.? If this was an assignment for you to solve, then for heaven's sake do it yourself and don't ask anyone else to do it.? That is called cheating.? Are you a cheat??
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If not, prove to us why you are not.
?
Regardless, are you really that lazy that you can't even begin to start this problem yourself?
?
Anyway, this is a group about LTspice.
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Andy
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Locked Re: Design a DC DC converter using NE555

 

My apologies for the duplicate identical messages from "otherappuser".? Partly my fault.? I've deleted the second one.
?
Andy
?


Locked Design a DC DC converter using NE555

 

A dc-dc converter which has to supply an output voltage of 5 V with the output power from 2.5 W to 25 W. The variation of the output voltage of ¡À5% is acceptable, however, the high frequency ripple resulting from the switching process has to be limited to ¡À1% in order to control the noise problems. The converter is to operate from various dc sources within a range of 9 V to 16 V. You can assume that apart from the amplitude variation the input source is an ideal voltage source. The isolation is not required for this converter. The design includes a control system. The output voltage should be used for full feedback control. The only energy source in the system is the input source, therefore the power for the supply of the control block needs also to be drawn from the input source. As the power dissipation of the control block is very small compared with the load power, you can use a simple voltage regulator for this power supply. We can use the following components to design in LT spice using NE555

?

? ?Resistors, including variable resistors,? ??Capacitors,?Inductors,? ?Diodes,? ??Zener diodes,? ??Bipolar transistors,? ??NE555 precision timer


Re: LTspice Help

 

Hi,
?
Yes, I normally end up at a web browser. ??
I have been searching for a source to re-download 24.012.? ADI seems to only allow downloads to the latest version.? I stay away from the latest of anything ... and I would like to retain compatibility with an older Windows 10 PC running 24.0.12.
I did find a couple of sites offering 24.012 downloads but I have no idea of their trustworthiness.? Is there a reputable source of older Versions for downloads??? Or am I stuck with upgarding both computers to 24.1.6??
?
Thanks,
Ian


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

On Tue, Apr 8, 2025 at 10:10 AM, <ankitk.ace@...> wrote:
Ton as per MOSFET datasheets is from 10% of Vgs till the Vds decreases to its 10% of full value. So shouldn't Eon be measured during the same time period? Or is it that until Vgs crosses Vth there is no drain current and therefore no Eon. And a similar explanation for Eoff.
Ankit,
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Please study figure 5 in the previously linked Nexperia whitepaper. It explains how and where they measure the turn on delay Tdon and rise time Tr (actually the fall time of the drain voltage). What you describe as the Ton sounds like the sum of these two values, i.e. the delay from Vgs rising until Vds starts to drop plus the time it takes for the device to turn on and Vds to drop to 10% of its maximum. You could measure all three of these values using similar measure statements, and a similar set of measurements to determine Tdoff, Tf, and Toff.?
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Eon is a measure of the total energy dissipated in the device as it turns on. The instantaneous power dissipation is the product of the voltage across the device and the current through the device. There is little dissipation when the voltage across the device is low because it is on, and little dissipation in the device when the current through the device is low because it is off. So for the turn on transition you measure from when the current stops being low (Id rises past 10%) to when the voltage starts being low (Vds falls below 10%). Between these two times there is substantial current through the device and substantial voltage across the device. Outside these times the dissipation is considered low and does not need to be included in the integration.?
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These additional measurement commands should extract these timing parameters from the circuit.
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.param Vgsrng={Vgsmax - Vgsmin}
.param Vgs10pc={Vgsmin + Vgsrng * 0.1}?
.param Vgs90pc={Vgsmin + Vgsrng * 0.9}?
?
.meas t5 WHEN V(g)={Vgs10pc} rise=1
.meas t6 WHEN V(d)={Vds * 0.9} fall=1
.meas t7 WHEN V(g)={Vgs90pc} fall=1
.meas t8 WHEN V(d)={Vds *0.9} rise=1
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.meas Tdon param t6-t5
.meas Tr param t2-t6
.meas Ton param Tdon+Tr
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.meas Tdoff param t3-t7
.meas Tf param t8-t3
.meas Toff param Tdoff+Tf
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You can use a measurement to find the maximum or minimum value of and expression like that shown below.
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.meas Idmax MAX I(d1) FROM ... TO ...
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And then use that value in an expression for another measurement something like this.
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.meas t10 WHEN I(d1)=Idmax*0.25 fall=2
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HTH


"Flaw" in UniversalOpamps

 

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I can't remember when the UniversalOpamps first came into being, but there's a good chance there's been a bug in them from the start.

Although I realised there was a problem long ago when I modified my copy of the old combined library file of UniversalOpamp2 to fix it, I had since forgotten about it. I failed to flag it up.

However, when dealing with a query on another channel, I came across a significant shortfall in expected performance when using the latest stand-alone UniversalOpamp models. I was attempting to emulate the TI OPA2211 opamp with one. The datasheet for the OPA2211 states that the differential input resistance is typically 20k¦¸, and the common mode input impedance is 2M¦¸. Usually, the CM impedance makes little difference to the performance of most circuits because it is typically very high, so I was surprised when putting Rin=20k that the amplifier lost about 5dB of expected closed loop gain when the source impedance was significant, by comparison.

I set up an impedance testjig for the UniversalOpamp3a that measured the input impedance in both modes.
TL;DR: neither the differential or common mode input impedance was 20k¦¸!

The differential input resistance was 40k¦¸, while the common mode input resistance was 10k¦¸. WRONG ANSWERS! I've uploaded the test schematic: UniversalOpamp_bug1.zip

The reason this happens is obvious when you look at the .subckt for UniversalOpamp3a:?
.subckt level3a 1 2 3 4 5
S1 5 3 N002 5 Q
S2 4 5 5 N002 Q
A1 2 1 0 0 0 0 N004 0 OTA G={Avol/Rout} ref={Vos} Iout={slew*Cout} Cout={Cout} en={en} enk={enk} in={in} ink={ink} Vhigh=1e308 Vlow=-1e308
C3 5 4 1p
C4 3 5 1p
R3 3 2 {2*Rin} noiseless
G1 0 N002 N004 0 {1/Rout}
R2 N002 0 {Rout} noiseless
C1 N002 0 {X*Cout/Avol}
R4 3 1 {2*Rin} noiseless
R5 1 4 {2*Rin} noiseless
R6 2 4 {2*Rin} noiseless
G2 0 N004 4 N004 table(0 0 10 {2*slew*Cout})
G3 N004 0 N004 3 table(0 0 10 {2*slew*Cout})
R9 3 N004 {2*Rout} noiseless
R10 N004 4 {2*Rout} noiseless
.param Rout=100Meg
.param Cout={Avol/GBW/2/pi/Rout}
.model Q SW(Ron=10 Roff=10Meg Vt=0 Vh=-.1 Vser={Rail} ilimit={Ilimit} noiseless)
.param X table(phimargin,29.4,3.5,32.1,2.9,33.8,2.6,35.8,2.3,38.1,2,40.9,1.7,43.2,1.5,45.9,1.3,49.2,1.1,53.2,0.9,58.2,0.7,64.7,0.5,73,0.3,86.1,0.05)
.param Avol=1Meg GBW=10Meg Slew=10Meg rail=0 Vos=0 ilimit=25m
.param en=0 enk=0 in=0 ink=0 phimargin=45 Rin=500Meg
.ends level3a
Resistors R3-R6 implement the supposed input resistance. Essentially, both opamp inputs have resistors of 2*Rin connected to both supply rails, and by implication (with ideal voltage sources) - to ground. Therefore each input has a resistance of Rin to ground. But - and this is a big but:

Rincm = (2*Rin//2*Rin)//(2*Rin//2*Rin) = 10k¦¸
Rindm = (2*Rin//2*Rin)+(2*Rin//2*Rin) = 40k¦¸

Since the default for the Rin parameter is 500k¦¸, the issues this typically causes are small compared to other parameters with typical feedback network impedances. But with the Rin parameter set to match the desire differential input impedance commonly found on datasheets of (bipolar) low noise opamps, things can go awry with those same feedback components.

This should be fixed. For practical components, the common mode I/P impedance is always higher than the differential I/P impedance. So, I'd say this was a bug.

--
Regards,
Tony


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

On Tue, Apr 8, 2025 at 09:33 AM, Andy I wrote:
The simulation has considerable "Trap Ringing" (or "Trap Oscillation") at the MOSFET's drain current when the MOSFET switches off.
You are correct about the trap ringing, and I hadn't seen any of it because I have modified trap selected as my default integration method.?
?
The plt file was generated by LTspice 24.1.5, so it may not be backward compatible with the older version you are still using.?


Re: PTC model with internal temperature rise

 

Hello,
based on the same work, I modified veijola model to add a temperature pin.
/g/LTspice/files/z_yahoo/Lib/PTC%20Thermistors/Physical%20model/ptc_veijola_pascal06.zip


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

Dear Andy,
?
Thank you for providing such a useful insight. I will keep this in mind and change the integration technique to Modified Trap or Gear.

With Regards,
Ankit


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

Dear Dennis,

A very good day to you.

You are a gem of a teacher, sir. While we do not know each other, still, you are my guru. I am grateful for your kindness. I will definitely acknowledge you in my thesis and presentation. I am amazed by your knowledge. I do not know LTspice at all. There's just too much to learn out there.

Ton as per MOSFET datasheets is from 10% of Vgs till the Vds decreases to its 10% of full value. So shouldn't Eon be measured during the same time period? Or is it that until Vgs crosses Vth there is no drain current and therefore no Eon. And a similar explanation for Eoff.

The way you used the .meas command to identify all the four zones is insightful.

Can I do the same kind of manipulation to identify the zones:
a) to measure conduction losses of any MOSFET/IGBT/Diode? (I suppose I am wrong here because conduction losses will depend on the load current that will be flowing through the MOSFET for a particular operating condition and I cannot be knowing it before hand)
b) to measure the reverse recovery losses of any given diode? (I can measure the time when diode current is just smaller than zero. This will be the beginning of reverse recovery period, however, I am wondering how to use the .meas command to figure out that the diode current has reached its negative maximum and find the time when it will reach 25%? of its value. Or should I just do the integration from the first zero crossing till the next one?)

If I have to recommend the same practice to someone else, how reasonably close may the data from such simulation study be with respect to the actual actual hardware measurements?

Again, thank you so very much, Dennis.

With Regards,
Ankit


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 
Edited

On Tue, Apr 8, 2025 at 10:53 AM, Dennis wrote:
I have uploaded a modified version of my MOSFET test circuit (2n7002 mosfet Eon.zip) ...
Excellent work.
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This comment from me, below, affects only few of you, so most of you can ignore it.
?
The simulation has considerable "Trap Ringing" (or "Trap Oscillation") at the MOSFET's drain current when the MOSFET switches off.? That is not unusual, and Mike Engelhardt used a situation like this to illustrate Trap Ringing.? (In case you don't know, "Trap Ringing" has bothered SPICE users since the beginning of time.? It is a mathematical artifact.)
?
The ringing is evident if you use the "Trapezoidal" integration method.? "Trapezoidal" was the SPICE default, but it is not LTspice's default which has the improved "Modified Trap" method.? Either "Modified Trap" or "Gear" methods eliminate the appearance of the Trap Ringing.? Go to Control Panel (Settings) > SPICE tab, and check the buttons under Default Integration Method.? Unless you changed it, yours is probably set to "Modified Trap" already, and you are good.
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I happen to have my LTspice set to the old default "Trapezoidal" method even though it can be problematic compared to "Modified Trap", because I actually want to see Trap Ringing when it happens.? Most LTspice users will not want to do that.
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LTspice's "Modified Trap" method is not really a distinct integration method; it is actually a post-processing nonlinear filter that removes 99% of Trap Ringing's visible artifacts.
?
Unrelated:? On the computer I used today, LTspice could not read Dennis's plot defaults (*.plt) file included with this simulation.? ?It reported "Plot setup file syntax Error".? I guess someone at Analog Devices must have modified the .PLT file syntax.? I had to enter the traces manually.? ?But that was not a problem, because the valuable results in this simulation are in the Error Log file, not the plotted waveforms.? Press Ctrl-L from the schematic window to see those results in the Error Log.
?
Andy
?


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 
Edited

On Mon, Apr 7, 2025 at 02:07 PM, <ankitk.ace@...> wrote:
Similarly, I also want to learn how I may obtain Eon and Eoff values for any particular MOSFET so that I may design the snubber circuit accurately and do the converter efficiency analysis in PLECS. It asks for these values (Eon and Eoff).
On page 4 of this whitepaper () Nexperia defines Eon and Eoff as measured from the 10% levels of the drain voltage and drain current as the MOSFET switches on and off.?
?
I have uploaded a modified version of my MOSFET test circuit (2n7002 mosfet Eon.zip) that uses a voltage pulse and gate resistor to turn the MOSFET on and off. It uses several measure statements to locate the 10% points as the MOSFET turns on and off, and then integrates the power dissipation in the MOSFET between those points as it turns on (Eon) and off (Eoff).
?
There is also power dissipation in the gate drive resistor which increases due to increasing gate current as the power dissipation in the MOSFET decreases due to reduced switching times.?
?
Again you will need to replace M1 with your MOSFET, and adjust the Iload and Vds parameters to match your operating conditions. The value(s) used for the parameters Rgate and Vgsmin and Vgsmax should be changed to the values your will be using to drive your gate.
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There are two sets of .measure statements that do the same thing. One set is commented out (shown as blue text) which uses a more complicated single measurement for each of Eon and Eoff. The second set separates the measurement of the four time points needed for the limits of the power integration to determine the switching energy, and makes the calculation more explicit.
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HTH


Re: LTspice Help

 

On Tue, Apr 8, 2025 at 01:03 AM, tinkera123 wrote:
...? Help on the top bar of LTspice (left clicking on LTspice Menu)? opens a Notepad file with the first lines as follows ....
<?xml version="1.0" encoding="utf-8" ?>
<!DOCTYPE html>
Sounds like your installation went sour, or that your computer is not set up to display HTML correctly.? I think it should have gone to your web browser, not to Notepad.? Maybe your computer has the wrong file associations.
?
Older versions of LTspice used the Microsoft Windows Help utility, but that does not apply here.
?
Andy
?


LTspice Help

 

Hi,
?
I tried to access LTspice Help Menu this morning to check the syntax of a Directive, but found that? Help on the top bar of LTspice (left clicking on LTspice Menu)? opens a Notepad file with the first lines as follows ....
<?xml version="1.0" encoding="utf-8" ?>
<!DOCTYPE html>
I'm sure this used to open a web page to the LTspice Menu.
Is this a LTspice change or have I stuffed up some settings in my PC eg default settings?? ? I have dug around in App settings for Notepad .txt files but to no avail ... and my computer knowledge ends there.
I am running Windows 11 (updated) and LTspice 24.0.12
?
At least I am trying to read the Help Menu .... :) :)? ,??? Ian
?
?


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

Hi Andy,
My mistake, I expected that there would be a time frame on Temp files, but I missed the fact that the original Messsage was 2023 ... thanks again for your Help.
Cheers, Ian


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 
Edited

On Mon, Apr 7, 2025 at 10:04 PM, tinkera123 wrote:
However, the following files haven't are not in the Temp folder (that I can see).
Ian,
?
The "Temp" folder name means "Temporary".? Files in the "Temp" folder are there only temporarily, not permanently.? Those files from this topic were uploaded to the "Temp" folder ages ago - between 12 and 24 months ago.
?
Those files (from this message topic) are now here:
?
? ? Files > z_groups.io > Files-sorted-by-message-number > msg_145488

Message .... 145488 .... I tried a simulation, but I do not know if the simulation set-up is pretty good/correct. Please see: /g/LTspice/files/Temp/Gate_Charge_Characteristic_Mosfet.zip?
Now that file is in the location listed above.

Message 145758 .... updated.zip
I do not think that is the right message number.? It is an unrelated topic about disk drive failure rates.? Perhaps you meant message # 145578.
?
The file that was mentioned in that message was not literally "updated.zip".? It was just an updated copy of "BSC160N15NS5_GateCharge.zip".? It is now located in the same location listed above in this message (in the folder "msg_145488").
?
Andy
?


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

Hi Andy I,
?
Yes, that was one of the Files I was searching for .... mosfet_gate_charge.zip??
and it has just appeared.
?
However, the following files haven't are not in the Temp folder (that I can see).
?
Message .... 145488 .... I tried a simulation, but I do not know if the simulation set-up is pretty good/correct. Please see: /g/LTspice/files/Temp/Gate_Charge_Characteristic_Mosfet.zip?
Message 145758 .... updated.zip
?
I am trying to understand where the Files referenced in the above Posts have been put ... ???
?
Cheers,
Ian


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

Ian,
?
Maybe you were looking for the file "mosfet gate charge.zip" that Ankit mentioned yesterday in message # 159674.
?
I have just moved that file back to the "Temp" directory.? For now, it is here:
?
? ? Files > Temp > mosfet gate charge.zip
?
Andy
?


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

On Mon, Apr 7, 2025 at 09:10 PM, tinkera123 wrote:
Mmmm .... I can't find any of these files. I'm in ????? /g/LTspice/files/Temp??
and have found and downloaded many files from this source.?
Any ideas ???
Just what files were you looking for?
?
Andy
?


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

Hi all,
Mmmm .... I can't find any of these files. I'm in ????? /g/LTspice/files/Temp??
and have found and downloaded many files from this source.?
Any ideas ???
Ian
?
?