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Re: 74HC_V.lib Issue
Hello eT,
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At first my confusion had me looking for a diode named "p".
Dp begins with D for diode but, now I realize that Dp is the output node of a BUF element as you have described.
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Removing the "ADDEL" BUF line eliminates the missing connection warning.
No need for the flip flop's data input to ride a BUF to nowhere.
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My realization of the 74HC74 has regularly been flip-flopping as expected without an "ADDEL" buffer so I commented it out to remove the warning.
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Thank you.
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All for now ?
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Sent:?Thursday, March 06, 2025 at 5:56 PM
From:?"eetech00 via groups.io" <eetech00@...> To:[email protected] Subject:?Re: [LTspice] 74HC_V.lib Issue Actually, in this case buf "ADDEL" output "DP" has a delay associated with it that isnt used.
It might have been intended for simulation of setup/hold time.
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It will take some testing.
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
Spice 3f3 user's manual is /g/LTspice/files/Temp/man_spice3.pdf |
Re: 74HC_V.lib Issue
On Thu, Mar 6, 2025 at 10:16 AM, eewiz wrote:
Those are harmless warnings. ?
They can be ignored.? We get them all the time.? If you really really want to make the warnings go away, connect a 1G resistor from the node to ground.? Voila, warning gone!
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I'm not saying there isn't another problem here that slipped through the cracks.? But those warnings about "less than two connections" are not errors and can almost always be ignored.
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Andy
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74HC_V.lib Issue
Hello All:
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WARNING: Less than two connections to node xlogic:u1:dp.? This node is used by a:xlogic:u1:ddel.
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xlogic:u1 is a 74HC74 from the 74HC_v.lib of which my copy has the following header;
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*? 74hc_v.lib
*? 74HCxxx Model libraray for LTSPICE from www.linear.com/software *? Revision 0.55 08/20/2003? ? *? Revision 0.56 08/21/2003??? ? *? Revision 0.57 02/04/2005 ? *? Revision 0.58 03/28/2005? ? *? Revision 0.59 03/29/2005? ? *? Revision 0.60 07/09/2006?? 74HC191 added? ? *? Revision 0.61 10/16/2006?? 74HC4538 added *? Revision 0.62 10/23/2009?? 74HC373 typo corrected *? Revision 0.63 11/13/2009?? 74HC533 added *? Revision 0.64 05/02/2010?? 74HC40103 added *? Revision 0.65 30/05/2010?? 74HC244 added *? Revision 0.66 01/30/2012?? enabled B(VCC) in input/output driver models *? Revision 0.67 10/04/2013?? 74HC_IN_0: V=LIMIT(0,V(in) -> V=LIMIT(0,V(in,VGND) ? *? Revision 0.68 09/30/2014?? corrected a typo HCT to HC in 74HC244 *? Revision 0.69 02/01/2019?? 74HC05 added. ?
The model is as follows;
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* D-filp-flop with asynchronous set and reset
* CP->Q Tpd 47n/17n/14n * R/S->Q Tpd 52n/19n/15n * CP/R/S Tw 19n/7n/6n * D->CP Ts 6n/2n/2n * D->CP Th -6n/-2n/-2n * R,S Trem 3n/1n/1n .SUBCKT 74HC74? S C D R Q QN? VCC VGND? vcc1={vcc} speed1={speed} tripdt1={tripdt} .param td1=1e-9*(17-5-3-3)*4.0/({vcc1}-0.5)*{speed1} .param td2=1e-9*(19-5-3-3)*4.0/({vcc1}-0.5)*{speed1} .param td3=1e-9*(17+2-5-3-3)*4.0/({vcc1}-0.5)*{speed1} .param td4=1e-9*(5)*4.0/({vcc1}-0.5)*{speed1} * XIN1? S Si? VCC VGND? 74HC_IN_1? vcc2={vcc1}? speed2={speed1}? tripdt2={tripdt1} XIN2? C Ci? VCC VGND? 74HC_IN_1? vcc2={vcc1}? speed2={speed1}? tripdt2={tripdt1} XIN3? D Di? VCC VGND? 74HC_IN_1? vcc2={vcc1}? speed2={speed1}? tripdt2={tripdt1} XIN4? R Ri? VCC VGND? 74HC_IN_1? vcc2={vcc1}? speed2={speed1}? tripdt2={tripdt1} * ACDEL? Ci 0 0? 0? 0?? 0?? Cp 0? BUF? tripdt={tripdt1}? td={td1} ADDEL? Di 0 0? 0? 0?? 0?? Dp 0? BUF? tripdt={tripdt1}? td={td3} ARINV? Ri 0 0? 0? 0?? Rn? 0? 0? BUF? tripdt={tripdt1}? td={td2} ASINV? Si 0 0? 0? 0?? Sn? 0? 0? BUF? tripdt={tripdt1}? td={td2} A1???? Di 0 Cp Sn Rn? QNi Qi 0? DFLOP? tripdt={tripdt1} td={td4} * XOUT1? Qi? Q?? VCC VGND? 74HC_OUT_1X? vcc2={vcc1} speed2={speed1}? tripdt2={tripdt1} XOUT2? QNi QN? VCC VGND? 74HC_OUT_1X? vcc2={vcc1} speed2={speed1}? tripdt2={tripdt1} .ends ?
I was able to find the culprit, highlighted in red above.
I was unable to devine where Dp should/could connect to eliminate the "Less than two connections" warning.
If it has only one connection, then possibly Dp could be eliminated but, that escapes me also.
I see that A1's data input is connected directly to Di which skips the ADDEL buffer.
Should A1's data input be connected to Di (input pin) or should it be connected to Dp (buffered delayed output)?
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All for now
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
I have a good PDF manual for Barkley spice, if it's needed.
toggle quoted message
Show quoted text
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
On Thu, Mar 6, 2025 at 03:24 AM, Carlo wrote:
There are many.? So many.? Here are some that have stood the test of time and are sometimes recommended, but are not cheap: ?
Ken Kundert's "Designer's Guide to SPICE and Spectre".
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Paul Tuinenga's "SPICE: A Guide to Circuit Simulation and Analysis Using PSpice".
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LTspice's Help has a FAQ page, "What about a Paper Manual?"? Have you looked there?? It showed 10 book titles with "LTspice" in the name.? That was as of about 2015 so I am sure there are many more now.? One that might not be on that list is W¨¹rth Elektronik's "The LTspice XVII Simulator", published in both German and English.? I can't tell you which ones on the list are better or which should be avoided, and I am sure the slant (the approach used by the author) varies from book to book.? Some may be designed to get a newbie going, whereas others delve into the details better.
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My personal experience with short tutorials about LTspice is that many of them are rubbish.? Some of their authors clearly do not know how to use LTspice well, and they cover up their mistakes by telling you to do things incorrectly in an attempt to fix what they did incorrectly.? Any Joe can write a tutorial and put it to video and claim that they know what they are doing.? But getting yourself published on paper takes a bit more skill.
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I recommend doing some checking around to see what's out there and what the reviewers say.
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Andy
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Restricting search in 'Messages' possible?
Hello all,
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I wanted to look through messages concerning the .FOUR command, but there are lots of messages
containing the number 'four' which also get included, way too much so I gave up.
Is there a way to exclude 'four' and search only for .FOUR (period-four)?
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Ryu |
Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
On Wed, Mar 5, 2025 at 11:20 AM, Carlo wrote:
I believe that is the normal SPICE behavior, to try there first. ?
It's been ages since I checked on that.? But it might be the option ITL1 = 100. ?
I suspect most books about SPICE will tell you.
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Andy
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
BTW, .option Noopiter in LTspice skips Direct Newton-Raphson (NR) iterations to calculate the ITS/DC operating point. Using default settings, LTspice will try Direct NR to calculate the ITS/DC operating point.
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How many "Direct NR" iterations are allowed to run before giving up (no convergence achieved) and start using homotopies (i.e. gmin stepping, source stepping etc..) ?
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
On Wed, Mar 5, 2025 at 01:22 AM, Andy I wrote:
We know exactly what ngspice is doing: (reading the source of the intrinsic model implementation, it is the standard DMOS and discrete SPICE diode model but has a thermal output node). According to the help, the LTspice model has a nonstandard Cgd(V) characteristic, and the anti-parallel diode is (of course) not like the substrate diode of a monolithic device.That is what I heard.? BUT -- Is it the same as LTspice's VDMOS?? ?That is, I don't think ngspice tries to copy LTspice, both try to approximate the same datasheet from the same parameters supplied by a .model line. Neither implementation is likely to produce nVs where Volts are expected. -marcel |
Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
On Wed, Mar 5, 2025 at 04:27 AM, Andy I wrote:
Ok yes, for transient analysis it is supposed to work that way. Therefore, at the end of transient analysis, there will be a total number of iterations done (some associated with ITS calculation and others to solve non-linear equations at successive timesteps until the end). ?
Ok, the above is made explicit in ngspice manual's section for .AC analysis. However, in the case at hand, even .AC analysis for both simulators doesn't provide a reasonable/good result (since the calculated DC operating point isn't reasonable). ?
Carlo
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
On Wed, Mar 5, 2025 at 05:48 AM, Carlo wrote:
I am uncertain what you suggested.? Why would either simulator use a "small signal linear equivalent circuit" for the transient simulation of something which is or might? be nonlinear?? Shouldn't it always solve the non-linear equations at each timestep?? That is how it is supposed to work, isn't it? ?
Using a small-signal linear equivalent circuit makes sense only for .AC analysis.
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Andy
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
On Wed, Mar 5, 2025 at 03:23 AM, <mhx@...> wrote:
NGSPICE has had a VDMOS model since release 32 (current is 44.2).That is what I heard.? BUT -- Is it the same as LTspice's VDMOS?? ?That is, did ngspice try to copy LTspice's VDMOS?? How successfully did they copy LTspice's VDMOS? ?
Or does ngspice do a completely different VDMOS model?? Does this fall under the "VDMOS means different things to different people" which I suggested?
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Andy
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Re: LTspice vs ngspice 12AU7 tube amplifier transient analysis
On Tue, Mar 4, 2025 at 05:06 PM, Andy I wrote:
Thanks Andy, that's the point indeed ! I downloaded the following IRF510 model from ?
.MODEL IRF510 NMOS LEVEL=3 VTO=3.699 KP=20.82U RD=21.08M + RS=450.8M IS=202.7F CBD=366.6P + CGSO=604.9P CGDO=62.62P ?
LTspice and ngspice return exactly the same answer for ITS. However it isn't good enough since the amplifier's output signal isn't there (only some nV oscillating around 0V).
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I let the simulation continue for 20 seconds (.tran 0 20 19) with no luck (with or without UIC to skip the ITS step). The output signal V(out1) isn't good at all both for LTspice and ngspice.
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Btw, as far as I understood, transient simulation doesn't use the same "small signal linear equivalent circuit" for non-linear devices (i.e. diodes, bjt, mos etc..). Instead at each timestep it leverages on the solver (possibly iterating to solve non-linear equations) to work out circuit's voltages and currents.
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Carlo.
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