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Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
On Tue, Feb 4, 2025 at 11:06 PM, eewiz wrote:
I tried a simple flat schematic containing a voltage source, V1 and two resistors, R1, R2. (I'm using 24.0.12) ?
If R2 is a resistor grounded on both ends, it remains in the net list, but is connected to 0 at both ends.
I(R2) cannot be plotted, and both ends of R2 report "This is ground".
?
V1 VCC 0 1
R1 VCC 0 1 R2 0 0 1 .tran 1 .backanno .end ?
If R2 is a resistor grounded one end and open wire on the other, it remains in the net list, but is connected to 0 at one end and a unique net name on the other. I(R2) can be plotted, but it will be 0nA.
?
V1 VCC 0 1
R1 VCC 0 1 R2 0 N001 1 .tran 1 .backanno .end ?
If R2 is a resistor grounded one end and open on the other, it remains in the net list, but is connected to 0 at one end, and a no-connection name "NC_01" on the other. I(R2) can be plotted, but it will be 0nA.
?
V1 VCC 0 1
R1 VCC 0 1 R2 0 NC_01 1 .tran 1 .backanno .end ?
But it all cases, resistor R2 remains in the net list.
Can you provide a simple example that demonstrates why you to have to run the sim multiple times?
? |
LTSPICE SAVEBIAS Issue
I have a very large PWM controlled Power Supply Circuit with dual outputs and It has been working fine until I added some new circuits as loads.? Since it takes a long time to reach steady-state operation, I usually simulate with some part value changes that allow it to come up faster.? Then, I use SAVEBIAS to create a file, that is used with UIC and LOADBIAS to kick-start the simulation for the correct value components, changes in loads, etc.
?
Recently, when I the file is ised with LOADBIAS it seems to use the file, but when I look at the Output file, it says, "Error: .nodeset syntax error."? I did not do anything with the file and used it exactly as SAVEBIAS created it.? I have a lot of Matrix Singularity issues with lots of nodes and wonder, if it is because the LOADBIAS is using some of the file and not all of it?
?
I looked in the discussions and only found something from a much earlier version of LTSPICE.? Something about incorrect use of the "#" sign in the file.
?
Any thoughts?
?
Thanks!
?
-BobT |
Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
Hello All:
?
Who desires to have to run a long simulation twice because the software maker could/would not make sub-circuit probing work correctly on the first run?
?
Also, something else that may be unnoticed, since it also is not detailed in the help file.
Closing a sub-circuit window destroys your hard won gains from running that long simulation twice.
Re-opening that sub-circuit puts you right back to square one.
The net returns to saying "This is Ground." and the simulation must me run a third time to fix it again.
?
All for now ?
Sent:?Friday, February 07, 2025 at 8:32 PM
From:?"Andy I via groups.io" <AI.egrps+io@...> To:[email protected] Subject:?Re: [LTspice] Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic On Fri, Feb 7, 2025 at 07:42 PM, eewiz wrote:
I am puzzled why you think it is "undesirable". ?
Andy
?
?
|
Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
On Fri, Feb 7, 2025 at 07:42 PM, eewiz wrote:
I am puzzled why you think it is "undesirable". ?
Andy
?
? |
Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
eewiz,
?
It is rare for schematics to both ground a node and connect it to an I/O pin so that it can be "brought out" to the next higher schematic level.? I'm pretty sure this is why you have never seen it before.
?
Me, I find it very useful for imported .SUBCKT models where the person who made the model grounded nets that I would rather not be grounded.? That is too often a problem for circuit designers who use a component in a way which is perfectly acceptable but the model-maker forgot to consider.? I find it far less useful to do that on a schematic, though, knowing (as I do now) that it adds very little extra flexibility.
?
The simple explanation is that the names of internal nodes always change when the netlist is expanded and subcircuit calls are replaced by their? subcircuit contents.? That happens all the time.? The thing is that there is no exception for node 0, which may not be true in all other SPICE programs.? What happens is identical to what LTspice does with every other I/O pin - and indeed it is what every SPICE program does (with possible exception of node 0).
?
It looks different because LTspice's schematic viewer wants to identify node 0 differently.? And there is that small bug that keeps showing "ground" rather than the translated netname, until you click Run.
?
Interesting.? I did not know that.? Thanks. ?
Andy
?
|
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
On Fri, Feb 7, 2025 at 06:00 PM, mstokowski wrote:
That's good. ?
For clarity, this is not just LTspice grammar.? It is SPICE grammar.? Other SPICE programs use it.? You have standards to follow and should never look at LTspice in isolation.? It is rather dangerous to abandon this part of the syntax as it makes LTspice incompatible with not only itself, but other SPICE programs and the many models made with them in mind.? You wouldn't want to do that, now, would you?
?
Now, as you will probably discover if you don't know this already, "^" has two different functions, depending on context, and not all SPICE programs handle it the same.? It can mean XOR or it can mean exponentiation.? Many imported SPICE models use it for exponentiation whereas LTspice used it for XOR (except in Laplace formulas).
?
Andy
? |
Re: Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic
Hello All:
?
Andy,
I was not opening the sub-circuit from windows, I always open sub-circuits from a top-level symbol.
Yes, as you described, having your sub-circuit already open does provide accurate probing.
?
It appears that I have never been in the right place at the right time to accidently discover that sub-circuit behavior.
An explanation of that undesirable nature of LTspice could be added to the help file.
?
It also works as described for Tony's suggested "This is node X1:COM" ground symbol.
?
Personally I will still remove all implicit grounds from sub-circuits.
That will avoid wasted time when one of many unopened sub-circuits must be opened before rerunning a time consuming simulation to allow acurate probing.
?
Also, double-left-clicking a symbol to open the underlying schematic works as well as "right-clicking on the instance of the symbol and choosing Open Schematic".
?
All for now
? Sent:?Friday, February 07, 2025 at 2:47 AM
From:?"Andy I via groups.io" <AI.egrps+io@...> To:[email protected] Subject:?Re: [LTspice] Any Good Reason to Create a Hierarchical Connector and Conductors to Route (Plumb) Ground Out of a Hierarchical Schematic On Thu, Feb 6, 2025 at 03:58 AM, eewiz wrote:
Actually, it does not.? If you still see "This is ground", then you are not seeing that schematic in the right context!
?
I think there are two ways that can happen:
(1) If you opened the schematic separately, rather than right-clicking on the instance of the symbol and choosing "Open Schematic".? Then you would have that schematic in the wrong context (lacking any context) and the net labels would effectively be wrong.
(2) If you fell into the synchronization "buglet" (small LTspice bug) I mentioned before.
?
If you follow the steps I described, in the order in which I listed them, then you would not see "This is ground."? You should see something like this:
? ? This is node N030.? DC operating point: V(n030) = 1.0V
?
But as I mentioned earlier, LTspice seems to display the wrong thing at first, unless you Run the simulation AFTER clicking "Open Schematic" from the Navigate Schematic Block pop-up.
?
Well, if it always says that, then perhaps this is a new bug.? In my experiments, I always had it showing the right thing when I used the right order.? I did not see "This is ground" unless either I did them in the "wrong" order, or if I opened the lower level schematic from Windows, making it out of context. ?
Can you verify that this always happens, even when done in the order I specified? ?
If it says "This is node X1:COM" with no operating point voltage, and if you click "Run" again, once or a few times, and nothing else (except to select the already-open lower-level schematic window), does it still show that?
?
My point is that LTspice should be showing you what you need, and if it doesn't, something is wrong.
?
Andy
?
?
|
Re: How to Set BJT Temperature
I am sorry, I spoke wrongly.? Ignore what I just wrote in my last reply.? You made copies of your .MODEL statement for a different reason.? Keep doing that.
?
Changing the temperature of a unique transistor affects only that one transistor instance.? It does not affect all LoB5551 transistors simultaneously.
?
Andy
? |
Re: How to Set BJT Temperature
I should have also mentioned --
?
There is no need to make copies of the .MODEL statements.? The same (original) .MODEL statement works just fine.??There is no need to make copies of the .MODEL statements only for the purpose of changing its temperature.
?
Also worth mentioning:? If the transistor is the only thing you have in your simulation that depends on temperature, then you do not need to change the temperature of the transistor itself.? You could just change the temperature of the whole simulation.? See the ".TEMP" dot-command.? It affects everything that does not have an override.? Adding "Temp=20" to one transistor gives it an override from the global temperature setting.
?
Andy
? |
Re: How to Set BJT Temperature
eewiz,
?
More elaboration follows.
?
In SPICE, every transistor has two parts in the netlist.? They can be in either order, but both must be there.? You need to:
?
Defining the transistor type uses either a .MODEL statement or a .SUBCKT block, which can be on the schematic itself or in a separate library file.? Adding a transistor symbol to the schematic adds an instance of that transistor.? In the netlist, it will begin either with "Q" or with "X".
?
For purpose of this discussion, let's consider only the .MODEL case.? Changing the temperature of a .SUBCKT transistor model is potentially much more complicated and I won't consider that here.? I hope you have only .MODEL cases to consider.
?
If the bipolar transistor is in LTspice's library or your own library and uses just a .MODEL statement, then the netlist line that adds an instance of that transistor starts with a Q.? A netlist line starting with Q tells SPICE this is a transistor, just the same way that "R105" tells SPICE you want a resistor.? In schematic form, add your NPN or PNP symbol, then click "Pick New Transistor" and choose one from the list.? Doing that creates a netlist line that starts with a Q.
?
Next, you need to get that "Temp=20" added to the netlist line that starts with Q.? Here are two ways to do that.? Do one OR the other, not both:
?
(1)? Ctrl-right-click on the transistor symbol.? Double-click in the Value2 attribute line.? Type "Temp=20" there, without the quotes.? Also double-click in that line's "Vis." column to make it visible, and click OK.? Done.
?
(2)? Alternatively, right-click on the TEXT next to the transistor with the transistor's model name.? Add "Temp=20" (without quotes) after the model name, with a space separating it from the model name.? (For example: "LoB5551 Temp=20")? This works like method #1 does, except that you would lose the "Temp" portion if you later Pick a different transistor from the menu.? I like #1 better.
?
Andy
? |
Re: How to Set BJT Temperature
Do not add the Temp setting to the .MODEL statement.? That's the wrong place.? It won't work there?
?
Add it to the component instance line.? In Netlist form, it's the one starting with a Q.
?
In schematic form, add it to the symbol, on one of its Attribute lines, after the part name.
?
Andy |
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
On Fri, Feb 7, 2025 at 03:00 PM, mstokowski wrote:
Thank you Michael |
How to Set BJT Temperature
Hello All:
?
On 24.0.12, I am attempting to individually set the beta and temperature of two distinct transistors.
The help file says:
Syntax: Qxxx Collector Base Emitter [Substrate Node] model [area] [off] [temp=<T>]
?
First I renamed two existing MMBT5551 transistors to LoB5551 and HiB5551.
Then I copied the MMBT5551 model onto my schematic twice, changing the model names and altered each Bf parameter as shown below.
?
.model LoB5551 npn (Bf=80 remaining-unaltered-parameters)
.model HiB5551 npn (Bf=300 remaining-unaltered-parameters)
?
Those model name and beta changes worked as expected.
?
Then I attempted to set each transistors temperature three different ways as shown below.
?
Neither
.model LoB5551 npn temp=20 (Bf=80 remaining-unaltered-parameters)??? (e.g. temp before params)
nor
.model LoB5551 npn (Bf=80 remaining-unaltered-parameters temp=20) ?? (e.g. temp within params)
nor
.model LoB5551 npn (Bf=80 remaining-unaltered-parameters) temp=20??? (e.g. temp after params)
works.
?
All produce
* Unrecognized parameter "temp" -- ignored
?
I also tried adding the sharp braces (e.g. temp=<20>) to precisely match the help file's syntax with no success.
?
Please help me understand the Q syntax related to setting a BJT's temperature.
?
All for now |
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
¿ªÔÆÌåÓýThank you very much. Please make it soon. On 2025-02-07 23:00, mstokowski via
groups.io wrote:
-- OOO - Own Opinions Only Best Wishes John Woodgate Keep trying |
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
On Fri, Feb 7, 2025 at 12:00 PM, eetech00 wrote:
Can't the "^" xor operator be retained for compatibility, and make the new xor() function optional? Noted. We are looking to add this back to the grammar.
?
--
Michael Stokowski LTspice Team Analog Devices Inc. |
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
On Fri, Feb 7, 2025 at 09:16 AM, mstokowski wrote:
Hi Michael,
?
That's very "Trumpian" of you....just kidding? :-)
?
Can't the "^" xor operator be retained for compatibility, and make the new xor() function optional?
? |
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
Yeah, WTF? Its like tRump and the american way of life! On Fri, Feb 7, 2025 at 2:20?PM Andy I via <AI.egrps+io=[email protected]> wrote:
--
AC2CL I do not think there is any thrill that can go through the human heart like that felt by the inventor as he sees some creation of the brain unfolding to success... Such emotions make a man forget food, sleep, friends, love, everything. - Nikola Tesla |
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
On Fri, Feb 7, 2025 at 12:16 PM, mstokowski wrote:
ARE YOU JOKING???
?
Your post comes about four and a half weeks too early (April 1).
?
Why is Analog Devices so intent on destroying LTspice??
?
Andy
? |
Re: Please help me use an IC PSpice model with multiple .subckt in the lib file
¿ªÔÆÌåÓýIt can't be good to compromise reverse
compatibility like this. On 2025-02-07 17:16, mstokowski via
groups.io wrote:
-- OOO - Own Opinions Only Best Wishes John Woodgate Keep trying |
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