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Re: Bad noise models for jfet transistors
#NOISE
¿ªÔÆÌåÓýHello All Andy wrote: "The "good" Linear Systems JFET models are here:??Go to Linear Integrated Systems's website?" Don't bother, I tried. All of their "Spice Model" download buttons lead either nowhere, or a PDF is downloaded that says: "We are sorry the file you are trying to download is not available. ?Please contact Linear Systems Factory directly" They have apparently pulled all of their JFET models. All for now
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Re: Multi-cycle current control
John,
Here is a follow-up to yesterday's mention of the spurious stuff at 3.33 Hz (and odd harmonics) that was about 80 dB below the fundamental. It's an artifact.? It's not in the signal. I am not positive yet, but I think it is an interaction between the FFT's re-sampling of the waveform (into 262144 points), and the risetime of the Gate signal.? I think the resampling around the fast risetime?shifts slowly over the simulation interval, resulting in false 3.33 Hz spurs. I am confident that there is no 3.33 Hz in the waveform itself.? It's just the FFT doing what it does.? In effect, we have aliasing, between the FFT's sample rate and the frequency content from the gated signal's rising edges.? If you push the FFT harder, the spurs go way down and are lost in the mathematical noise. Maybe you didn't care, but since you noticed the spurs, I thought it was fair to say what they are. Andy |
Re: Multi-cycle current control
Hi John,
I do not know why this works. I changed the commands on the schematic to include more precision. .options numdgt=10
.options measdgt=10
.options plotwinsize=0 is listed on it's own seperate command line. The simulation runs without any errors. After completing the run, I commented out the precision statements. The simulation continues to run without any errors, evan when I close LTspice and restart. I suspect that the initial command to increase precision has had some internal effect on either the net list or LTspice execution sequence / setup. THIS IS ONLY AN OFF THE WALL GUESS. Someone with much more knowledge of LTspice may be able to give a much better answer to this. Mike |
Re: Multi-cycle current control
John,
The command-line you tried to add was "options plotwinsize=0".? That.s OK, except that it is missing the leading period.? So, LTspice sees it as an attempt to add an O-device, which is a Lossy Transmission Line and needs 4 nodes. Indeed it might not be a helpful error message, but that's because LTspice can't second-guess you and understand that "options" should have been ".options" and not a legitimate circuit component.? Sometimes it's the subtle things we miss. There's nothing wrong about giving it a PWL that lasts longer than the simulation does.? You could have made it only 30 ms long and added REPEAT FOREVER ... ENDREPEAT around that.??But I think your PWL has a mistake.? The 5th positive pulse, and every 4th positive pulse after it, is not a rectangle, it's a triangle.? Plot V(gate) and run the simulation for 300 ms to see it.? I think that's because the repeating sequence starts and ends at different voltages, starting at 1 V and ending at 0.5 V.? So it "wraps around" with a triangular step from 0.5 V to 1 V. You could replace your PWL source with PULSE (0.5 1 0 10u 10u 9.99m 30m) and I think it would do what you want.? But that's assuming that it really is periodic every 30 ms, which you imply it might not be. I think your PWL misses the first point at 0 sec in each REPEAT because it coincides with the previous one's last point at 120 ms.? I think the REPEAT causes the ends to splice EXACTLY together, with first and end points being coincident.? I think it sees it as if the PWL has: ? ?... 100.01m 0.5 120m 0.5 120m 1 130m 1 ... As you can see, that thas two PWL points at exactly 120 ms.? I think it uses the first and ignores the second one.? So you probably need to end your repeating sequence with a point at 0.5 V slightly before 120 ms, followed by 1 V at 120 ms.? Either that, or make the sequence start at 0.5 V and jump immediately to 1 V. Andy |
Re: Multi-cycle current control
¿ªÔÆÌåÓýThanks, Andy. I have uploaded '3-cycle sine
symmetry.asc'. To see the waveforms, simulate for 120 ms. You
may tell me that I don't need to specify the PWL for as much as
120 ms, but that raises an awkward question about the truth of
'3-cycle', and I don't want to go there. I looked at the netlist and can see nothing to
trigger the 'Missing node' warning. I quite agree with you that
plotwinsize should not produce this warning. The warning appears
on the schematic screen. The error log just reports 'Fatal
error; missing nodes'. On 2023-07-29 19:29, Andy I wrote:
I am pretty sure that the "Missing node(s)" warning is not related to the ".options plotwinsize=0".? I can't see any way that one would cause the other. |
Re: Multi-cycle current control
I am pretty sure that the "Missing node(s)" warning is not related to the ".options plotwinsize=0".? I can't see any way that one would cause the other.
Any chance of uploading the schematic? It's possible that the appearance of the "Missing node(s)" warning also points to the command or element line that caused it.? The warning might appear right below the offending line -- or perhaps two lines down from it, since LTspice may need to see the next line, before it realizes that node(s) are missing. Andy |
Re: Multi-cycle current control
¿ªÔÆÌåÓýI am now looking at another control method
that changes the amplitudes of successive half-cycles of the
sine wav, in the sequence 1,0.5,0.5,1,
0.5,0.5,1,0.5,0.5,1,0.5,0.5. I made a PWL voltage source to give
me that and multiplied it by the 50 Hz sine wave to get the
controlled waveform. Much to my surprise it worked. BUT (there
is always a BUT)? if I include options plotwinsize =0, I get a
'Missing node(s)' warning. Not a helpful one.
On 2023-07-28 12:25, John Woodgate
wrote:
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Re: Bad noise models for jfet transistors
#NOISE
Yes, this is a "known" problem, and it's been known for a rather long time.? It was before Tony's message in 2022.? I don't recall exactly when it was first discussed in this group. but it was quite a while ago.? LTspice used the defective JFET models from Linear Systems (Linear Integrated Systems) starting pre- or early-COVID.? It was not only updates where you got the bad models, you got them even just by installing LTspice XVII.
? ? "It looks like a transcription error made by someone at ADI, ..." Actually, I believe the error was made by someone at Linear Systems.? See below. ADI was not innocent.? They accepted the bad models without questioning them. Linear Systems has (good) SPICE models of most of their JFETs.? You can find links to them on the webpage for each JFET, and those models are OK.? But at some point, someone at Linear Systems merged all the JFET SPICE models together into one file, and that was when the mistake happened.? Then they shipped the merged file off to ADI for inclusion in LTspice. The biggest problem is the Kf noise parameter.? I'm guessing that the person who merged them had not seen numbers that small before (e-18).? Probably through recklessness, he altered them.? e.g., "Kf=45.61E-18" morphed into "Kf=45610f" which made it one million times larger!? Maybe he thought he was being "clever" by changing from scientific notation into a letter multiplier, but he went the wrong way, moving the decimal point in the wrong direction!? (As you can tell, I am only guessing.) ADI could have made a thorough check, testing every JFET model in the file on a handful of test jigs, but that's a lot of work and hardly anyone does .NOISE analysis anyway.? I'm guessing ADI assumed the Linear Systems models must be OK, so they were incorporated into LTspice without question. ? ? "Can you share the "good" jfet models or point me to where I can find them?" The "good" Linear Systems JFET models are here:??Go to Linear Integrated Systems's website??and look up a JFET in the product selector.? Go to that JFET's page.? Most of their part webpages have a link to THAT one part's SPICE model.? These individual SPICE models are OK.? (Yes, there are questions about some of the other parameters in some of the models, but at least the Kf parameter is "OK".) If you find a link on Linear Systems's website to download all their JFET SPICE models in one file, stay away from that one!? It is the "smoking gun". Bordodynov has many SPICE models where he has tweaked them to fit measurements.? Trust his models. Andy |
Re: Bad noise models for jfet transistors
#NOISE
Can you share the "good" jfet models or point me to where I can find them?
Thanks? |
Re: Bad noise models for jfet transistors
#NOISE
¿ªÔÆÌåÓýI have written about this several times in this group, starting with #138735. I have also complained to ADI about it a number of times. All to no avail.It seems that the general problem with the affected models is that the Kf parameter in standard.jft is 1e6 times bigger than the same model available directly from Linear Systems. It looks like a transcription error made by someone at ADI, or whoever they have outsourced the standard libraries to. --
Regards, Tony On 29/07/2023 07:05, §¡§Ý§Ö§Ü§ã§Ñ§ß§Õ§â
§¢§à§â§Õ§à§Õ§í§ß§à§Ó wrote:
I haven't updated for a long time (since March 15). Now I updated and found that Linear Systems' JFET models have been changed. From weakly wrong noise models they replaced them with ultra-noisy models! I have the correct noise models from this company have the suffix _n. I customized the models to match the datasheet. I had to add the suffix so that my correct models would not be replaced by the wrong ones when updating, as I had already done several times. |
Re: Bad noise models for jfet transistors
#NOISE
My files are tools and one should take care of them.
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Re: Bad noise models for jfet transistors
#NOISE
I always do a backup of my stuff before updating, but I haven't updated in a long time, because wouldn't of they done it right the first time?
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