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Modeling gate capacitance of a FET
Hello, Using the NMOS level 3 FET. How do I define the parasitic capacitances like Cgs?? I've found elsewhere, not in the help file, that Cgs=Cgso x W or (overlap) times (channel width). If you know Cgs from the real datasheet and say W=1u then you can calculate Cgso and define it in the .model directive. Is Cgs then implied by LTSPICE after defining Cgso? Or do I need to wrap it externally by a cap within a .subckt directive?? Is this the most direct/convenient way or have I missed something? Thanks, Gilbert |
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Re: Model for F0800LC180 PUK diode
¿ªÔÆÌåÓýHello jlopez,
this might serve as a starting point in modeling the diode:
.model F0800LC180 D(Is=500 Rs=390u N=5.34 Ikf=480u Isr=4.2e-30?Cjo=100p Tt=90n BV=1800 Iave=775 Vpk=1800 mfg=Westcode type=silicon)
It models the U/I-characteristic, reverse current, breakdown and reverse recovery. However, it is not tested and the value of Cjo might need some adjustment, as the data sheet gives no indication of the reverse capacitance of the diode. You might need to set up some simulation test cicuits with this model to refine it further to reach accordance with the datasheet data.
Best regards
Gerhard Kaufmann Von: LTspice@... im Auftrag von jlopez2022@... [LTspice]
Gesendet: Dienstag, 27. November 2018 16:30 An: LTspice@... Betreff: [LTspice] Model for F0800LC180 PUK diode ?
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I am looking for a model for that diode or the way to obtain it. I like that diode because its price is not so high and reach 775A averaged and 1800V. The specs can be found here, appear the Trr that is important in the design of a high power rectifier:
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Re: fft of sine wave
¿ªÔÆÌåÓýIf you do an FFT of just half a sine wave, that's what you get. If you change 5 ?s to 50?s and do the FFT you will see the strong line at 100 kHz and a lot of 'noise' at much lower levels. You should always simulate, if possible, for a whole number of cycles of every signal you are analysing. That may require many cycles, e.g. if you have 100 kHz and 105 kHz. Time step should be 1 % of the period? of the highest frequency, or less. The time-step affects the number of points in
a cycle that are evaluated. To minimize computation noise,
evaluate many points. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates Rayleigh, Essex UK On 2018-11-28 14:29, goy123t@...
[LTspice] wrote:
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Re: Is it possible to dynamically change a part's location in one simulation ?
Hi, John:
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Show quoted text
But it becomes very slow, and seems never get the goal/final step, if put many similar circuits in same schematic, too many redundant portions/actions, make it very inefficiency. Ironically, I need to see how those wonky architecture of TTLs badly ruin the system, and analyze which part/location is the worst, and understand more detail of the characteristic of BJTs, why they can't behave same as CMOSs in digital/modern computing domain. And maybe, unfortunately learn 'how to let go', though I don't know why should I do that, maybe just some subjects in the future I will need, I tend to think more when I am in free time. But I think you have gave the answer, it's impossible. Thus, I backup another file, everytime when I try to run those kind of simulations, I resume it will fail at the final, so that maybe after decades times I will give up, then I will use the backup to recovery the ruin one which already shown how badly it was. That's the whole story, but I still think the wonky one will be still wonky. Never evolution automatically. ---In LTspice@..., <jmw@...> wrote : You can do it indirectly by putting several
circuits in one .ASC file, with the components in different
positions, and running the .ASC. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates Rayleigh, Essex UK On 2018-11-28 09:57,
ericsson.sunshine@... [LTspice] wrote: ? |
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fft of sine wave
hi i wanted to use fft in ltspice for a sin wave(schamtic attached with name as : fft_sine_wave) . i saw that i have other frequency in fft result, why? second question: for a input signal with specific frequency, how value we select? total time and? time_step and number of sample? third question : if fft used the values from transient analysis, the time step in tran. analysis effect result of fft and how? thanks |
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Re: AES17-20k Filter
No offence was taken.I think I'll need a week's worth of time for my foot to recover from the pulling... :-) -- Vlad ______________________ ltspicegoodies.ltwiki.org -- holding, among others: a universal analog/digital filter, block-level models for power electronics (and not only), math blocks with a more stream-lined approach, some digital ADC, DAC, (synchronous-)counter, JKflop, etc. |
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Re: Edge triggered b-source logic and integrated averaging in LTspice
¿ªÔÆÌåÓý
Le 28/11/2018 ¨¤ 12:23, tony@...
[LTspice] a ¨¦crit?:
?I don't know how dangerous it is, but I couldn't resist caricaturing how people are put in boxes. PC is killing lateral thinking. Probably because you have not reached the degree of friendliness where it becomes an affectionate term. It's G.B. Shaw that mentioned "countries divided by a common language. |
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Re: Edge triggered b-source logic and integrated averaging in LTspice
¿ªÔÆÌåÓýIt's best we don't go there, either. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates Rayleigh, Essex UK On 2018-11-28 11:23, tony@...
[LTspice] wrote:
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Re: Edge triggered b-source logic and integrated averaging in LTspice
You're on dangerous ground, there, Jerrylee - it's probably best we don't go there. Like Andy, I enjoy the international nature of this group and admire those who contribute, whose native language isn't English of one flavour or another. I wish my language skills were as good as some of those, especially since I now choose to live in a country (yours), where I often struggle with the language. That has never diminished how welcome I feel, and I have never (to my knowledge) been called "rosbif".? ![]() I am currently working in Sweden, and am somewhat in awe of the quality of English spoken by everyone here. I believe proportionally more people speak English here than in some countries where the official language is English. How ironic, therefore, that the largest of the English-speaking nation of Europe is in the throes of choosing isolationism. We should celebrate what unites us over what divides us. Just my view. Regards, Tony |
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Re: Edge triggered b-source logic and integrated averaging in LTspice
¿ªÔÆÌåÓý'Praize' is not correct, it's 'praise', as opposed to 'prize', which you may have had in mind. The form '-ize' is 'more correct' for most
words than '-ise', which was invented in the 1920s by British
newspapers.? But English doesn't have many 'rules' for judging
correctness, only thousands of exceptions. This especially
applies to the use and omission of articles. There really aren't
any rules, only usage; I know when an article (or no article) is
wrong, but there is almost never a reason for it being wrong. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates Rayleigh, Essex UK On 2018-11-28 10:17, Vlad
imbvlad@... [LTspice] wrote:
Thank you for the praize, quite the surprise. This would imply my |
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Re: Is it possible to dynamically change a part's location in one simulation ?
¿ªÔÆÌåÓýYou can do it indirectly by putting several
circuits in one .ASC file, with the components in different
positions, and running the .ASC. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates Rayleigh, Essex UK On 2018-11-28 09:57,
ericsson.sunshine@... [LTspice] wrote:
? |
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Re: NAND, INV, CMOS, HCMOS logic series - are there models in LTSPICE?
Hello Christoph, There is a library with HC and HCT in our group's directory Files > Lib. Models: 74HCT.lib Symbols: 74HCT.zip Please although take a look to the examples from this folder. It's best practice to copy the symbols(.asy) you need to the folder of your schematic. Although copy the file 74HCT.lib into this folder. Please be ware that these models are somewhat idealized. This means they may behave better than the real parts especially regarding output drive capability. ? Best regards, Helmut |
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Re: NAND, INV, CMOS, HCMOS logic series - are there models in LTSPICE?
¿ªÔÆÌåÓýDownload and save all_files.htm from the web site and open it in
your browser. Search (CTRL-F) for likely keywords, such as CMOS. Best wishes John Woodgate OOO-Own Opinions Only J M Woodgate and Associates Rayleigh, Essex UK On 2018-11-28 09:23, kuku@...
[LTspice] wrote:
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Re: NAND, INV, CMOS, HCMOS logic series - are there models in LTSPICE?
Hello Cristoph
As the subject say: I'd like to use some NAND gates like 74HCT03. Is there aIf it's just "gates like ...", then you have the directory [Digital], with A-devices (see the manual for more details, and ltwiki.org for even more). If it's a CMOS or the likes you're looking for, there are some libraries in the group's Files area, or, you can always build one from scratch, yourself, with NMOS4 and PMOS4 readily available. -- Vlad ______________________ ltspicegoodies.ltwiki.org -- holding, among others: a universal analog/digital filter, block-level models for power electronics (and not only), math blocks with a more stream-lined approach, some digital ADC, DAC, (synchronous-)counter, JKflop, etc. |
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Re: Edge triggered b-source logic and integrated averaging in LTspice
You know how to use definite and indefinite articles perfectly, but youThank you for the praize, quite the surprise. This would imply my English is better than I had hoped. I know there are inconsistencies such as 'to praize/surprise', etc, but that's mostly because, in school, I learned British-English, while most of the ...audio training was Hollywoodian in nature, so to speak. However, Andy is right, I am Romanian, and Vlad is a fairly common name here, even if the origins are slavic -- they had the second highest influence in history, from which we got the Orthodox church and the cyrillic alphabet (used up to the 18th century, even if the language was Latin-based). I've never been in the US before, or UK. What do you know of traditional Russian foods? I know praniki is a genericThey're called biscuits here and, for my part, the "old" recipes still contribute to higher levels of moisture on my tongue... -- Vlad ______________________ ltspicegoodies.ltwiki.org -- holding, among others: a universal analog/digital filter, block-level models for power electronics (and not only), math blocks with a more stream-lined approach, some digital ADC, DAC, (synchronous-)counter, JKflop, etc. |
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Re: AES17-20k Filter
[...] in my defence [...]I hope I'm not perceived as dismissive of your efforts, I honestly had no intention of that. My apologies if this is how it turned out. On the contrary, seeing that you made the effort to provide such an example, I thought I'd contribute with a suggestion, backed by a minor proof. That's all. It also has the advantageIt only uses G+C+R, so this one should also be SPICE friendly. The whole package might not, though. There's AES17_Filter_2.zip in Temp with what I meant. It also includes the 7 design possibilities (that I know of) to serve as a few choices. -- Vlad ______________________ ltspicegoodies.ltwiki.org -- holding, among others: a universal analog/digital filter, block-level models for power electronics (and not only), math blocks with a more stream-lined approach, some digital ADC, DAC, (synchronous-)counter, JKflop, etc. |
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Is it possible to dynamically change a part's location in one simulation ?
Hi, : It occurred to me, and confused me a while, typically I hope to dynamically change a part's location in the schematic of LTspice when I am running simulation, that means different circuit topologies but similar, it helps to "batch" those result in one-click simulation. Like the 'step' directives, but step doesn't support different topology (part's location). I never used that, but I think if it's possible, that would be great. Actually, more great stuff is the parts (which change locations) could be changed their 'model', I mean dynamically change, eg: R -> C, C->L, etc, and the polarities. Like the '.list' directives, but '.list' only change the fixed part's intrinsic value. Though it's almost impossible, but I better ask one time to get the exact answer. Which maybe I could inherit something, maybe store it in my mind. Thank you very much. Have a nice day! Best regards. |
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Re: encapsulating a long set of spice directives
Ah, Shift-Ctrl-Alt-H works but ONLY for text attached to components (i.e., only for hidden Attributes).? It has no apparent effect on Comments or on SPICE Directives. Making the Comment or SPICE Directive text hidden, and later visible, moves the text around relative to other components.? So my recommendation is DON'T USE IT. Regards, Andy |