¿ªÔÆÌåÓý

Date

Re: Questions about phase in .AC LTspice Analysis

 

Hello Hnguyen,

> Could you please tell me where they are, so that I can learn from that.


Open your original "wrong" asc-file.

Right-mouse-click on the symbol of the source "Vcmfb1_2c" and "Vcmfb2_2c".

The V-source dialog window will pop-up. You will see a field "AC Amplitude". This should be empty or 0 in your simulation. You will also see that you have un-ticked "make this information visible on the schematic".


AC Amplitude: 1


Best regards,

Helmut



Re: Questions about phase in .AC LTspice Analysis

hoa van nguyen
 

Hallo Helmut,

I found 2 extra AC sources in Vcmfb1/2 and It was an accident.
Imaging how you found them.

Thanks
Hnguyen


On , hoa van nguyen wrote:
Hello Helmut & Andy,

Thank you for helping me.
Helmut: You have defined "AC 1" in two extra sources. This is simply wrong for this application. Instead you should define AC 1 in the input source. By the way it's bad practice to hide the AC-value in a V-sources as you did.

A: it must be an accident. I ran your corrected "2stages_2CascodeDiff_ACsim_test2.asc"?
and it works great, but I still don't see where are "AC 1" in two extra sources in my
schematic. Could you please tell me where they are, so that I can learn from that.

Now slowly I understand what you tell me. I need time to think about what I learn
so far from your guys and would like to go back to your guys for my full understanding.

Regards

Hnguyen

On Friday, December 6, 2013 12:48 PM, "helmutsennewald@..." wrote:
?
Hello Hnguyen,

You have defined "AC 1" in two extra sources. This is simply wrong for this application. Instead you should define AC 1 in the input source. By the way it's bad practice to hide the AC-value in a V-sources as you did.

I have corrected your schematics and uploaded it into your folder. Simulate with my files and you will see that everything is OK now.

Best regards,
Helmut





Re: Questions about phase in .AC LTspice Analysis

hoa van nguyen
 

Hello Helmut & Andy,

Thank you for helping me.
Helmut: You have defined "AC 1" in two extra sources. This is simply wrong for this application. Instead you should define AC 1 in the input source. By the way it's bad practice to hide the AC-value in a V-sources as you did.

A: it must be an accident. I ran your corrected "2stages_2CascodeDiff_ACsim_test2.asc"?
and it works great, but I still don't see where are "AC 1" in two extra sources in my
schematic. Could you please tell me where they are, so that I can learn from that.

Now slowly I understand what you tell me. I need time to think about what I learn
so far from your guys and would like to go back to your guys for my full understanding.

Regards

Hnguyen

On Friday, December 6, 2013 12:48 PM, "helmutsennewald@..." wrote:
?
Hello Hnguyen,

You have defined "AC 1" in two extra sources. This is simply wrong for this application. Instead you should define AC 1 in the input source. By the way it's bad practice to hide the AC-value in a V-sources as you did.

I have corrected your schematics and uploaded it into your folder. Simulate with my files and you will see that everything is OK now.

Best regards,
Helmut



Re: Questions about phase in .AC LTspice Analysis

 

Hello Hnguyen,


You have defined "AC 1" in two extra sources. This is simply wrong for this application. Instead you should define AC 1 in the input source. By the way it's bad practice to hide the AC-value in a V-sources as you did.


I have corrected your schematics and uploaded it into your folder. Simulate with my files and you will see that everything is OK now.


Best regards,

Helmut


Re: Questions about phase in .AC LTspice Analysis

hoa van nguyen
 

Hello Andy,
Your thinking is what I see in "2stages_2CascodeDiff_ACsim_test1.jpg".

Andy: I think the main reason is that those two bias sources have a large AC component (10 times the magnitude of the actual input signal). ?Why do you have input signals (AC components) entering through three different places into your amplifier circuit? ?I would think that should not be happening, which makes me believe your .AC simulation is not simulating the circuit you think it is.

Do you mean 2 bias sources: Vcmfb1_2C_V & Vcmfb2_2C_V?
let me explain what problem I have. These Vcmfb1_2C_V & Vcmfb2_2C_V
are actually come from CMFB-Circuits (Common mode Feedback with
switch capacitors, clocks) which adjust the common mode of outputs to
Vdd/2: (Vodm+Vodp)/2 = Vdd/2 and (Vop+Vom)/2 = Vdd/2.
Since the CMFB-Circuits only work in TRAN-Analysis, so I get these values
Vcmfb1_2C_V & Vcmfb2_2C_V from TRAN-Analysis. So I use these 2
values for AC-Analysis. I didn't specify AC components for these 2 voltage
sources, so I thought it should be alright. What should I do now?

I see something wrong with my biasing!!

Regards

Hnguyen


On Friday, December 6, 2013 7:29 AM, Andy wrote:
?
Jerry Lee Marcel wrote:

For some reason, LTSpice doesn't want to show currents

That's because of this statement on the schematic:

? .Save V(*)

Comment it out and re-run, and you can plot currents.

Andy





Re: CD4047 BC

 

Does anyone have CD4047BC spice model?

--- In LTspice@..., shawn coleman <scolem26@...> wrote:

I think the CD4098 is what I need.?? If any of you experts know different plz advise.?? I cant find a model for the CD4098 but I found the model for CD14538B in the cmos lib.?? The CD14538B seems to be essentially 1/2 of a CD4098 so maybe i can model the CD4098 as two CD14538B...


Thank You,


Shawn


________________________________
From: 6000 <scolem26@...>
To: LTspice@...
Sent: Friday, January 25, 2013 11:44 AM
Subject: [LTspice] CD4047 similar


??

Hi. Im currently working with CD4047 because I need positive edge triggering + duty cycle programmable that's independant of the input duty cycle. The outs of the CD4047 are all in phase. I was hoping to not have to use two CD4047's because I need the above capability for two input signals. Is there a single chip that allows dual in and dual out that are positive edge triggered with programmable dcycle independant of input?

Thanks in advance




Re: Determine phase and gain margin in filter/amp

 

Typically opamps will have low impedance follower type output stages so that open loop output impedance versus frequency remains low (20 to 50 ohms) to well beyond the opamp's gain-bandwidth frequency.? This is the type of opamp that the universal opamp models well.

However rail-to-rail opamps usually have transconductance type output stages so that their open loop output impedance is much higher, typically several k-ohms at high frequencies.? This is not always specified on the data sheet, but is critical for building a realistic model.? Perhaps that is what is missing from your simulation of the MCP6292.


xr2211 model

 

Hi, i am new in ltspice and i'm trying to simulate de XR2211(EXAR) but i can`t find a model. Now i'am trying to create de subcircuit but it's too difficult. Asking for help
Can i create a subcircuit from the datasheet??



?


Re: Questions about phase in .AC LTspice Analysis

 

Jerry Lee Marcel wrote:

For some reason, LTSpice doesn't want to show currents

That's because of this statement on the schematic:

? .Save V(*)

Comment it out and re-run, and you can plot currents.

Andy



Determine phase and gain margin in filter/amp

 

Dear people,

I¡¯m unsure about the stability of my opamp filter/amplifier design. Therefore I wanted to understand gain and phase margin better. Good idea?

At the following link Mr. Kris Lokere from Linear showed how to determine phase margin on a basic inverting opamp amplifier in LTspice.

http://www.linear.com/solutions/4449

I¡¯m using the UniversalOpamp2 model and entered the parameters to represent the MCP6292 from Microchip.

I¡¯m assuming gain margin can also be determined in the resulting AC plot window.

Then I applied his method on my circuit. File: ¡°filter_determine_phase_and_gain_margin.asc¡± in temp folder. I hope I did this right because the phase response varies a lot over frequency. There are frequency points where the phase shift is 155 degrees with a gain of about 9 dB. But never hitting the 180 degrees point in the range from 10Hz to 100MHz. Phase margin is 107 degrees, this happens at 8.5MHz.

Questions)
1.?? ?Is my simulation correct for the determination of the phase and gain margin?
2.?? ?Does my circuit have reliability flaws, in stability or maybe in other aspects as well. (I¡¯m very thankful to the person who could show my if anything problematic is the case)

Thank you very much for your attention and time!

Best regards,
Maarten Verhage


Re: Questions about phase in .AC LTspice Analysis

 

No doubt it was just unintended carelessness, but you misspelled LTspice (the "s" is not uppercase).? Also, please note that for LTspice to record and display certain currents, you must check the appropriate options within the Save Defaults tab of the Control Panel.
_____________

99+ percent of bug complaints regarding LTspice are not to be found on the software side of the user interface.


Re: MAX8515 model for ltspice

 

Hi.
Look IC ZXRE060.
The model is in the group. I used this chip in their designs. I also changed the model. Had to replace the ideal current source on piecewise lineynyy.My model and symbol chip is on the site ltwiki.org (large folder from Bordodynov).
Model MAX4163=MAX4162 in file Opamp5.lib (in my folder).
Bordodynov.


Re: Questions about phase in .AC LTspice Analysis

 

¿ªÔÆÌåÓý

You may think the voltages are correct, but they are not.
Current in M7, M1 and M4 is zero so vodm is stuck at Vdd
For some reason, LTSpice doesn't want to show currents, so you have to insert 1 ohm resistors in series and measure voltage across.

Le 06/12/2013 01:44, hoa van nguyen a ¨¦crit?:

?
Hello Jerry,
I understood in this way:
M7/8 are biased to Vinp=Vcm=750mV
Drain voltages of M7/8 are ncr/ncl=589.5mV=590mV
Source voltages of M7/8 are n_src1_2c=345.856mV=346mV
MOS-Threshold VTn=0.2V (with Vbs=0V) in Model;
VTn=0.25V (guessing) (with n_src1_2c=346mV).

Transistor in saturation when Vds_M7/8 >= Vgs - VTn.
Vds_M7/8 = 590mV - 346mV = 244mV
Vgs - VTn = (750mV - 346mV) - 250mV = 154mV

Vds_M7/8 (244mV) >= Vgs - VTn (154mV): M7/8 should be in
saturation and this Cascode Diff. Amplifier should gives high
gain which I saw in TRAN-Analysis.



MAX8515 model for ltspice

 

Dear all,


I am working on circuit which requires a MAX8515 shunt regulator & MAX4163 dual op-amp. I would like to build the circuit and simulate it. Can anyone have the ltspice working model for MAX8515?.Also as a alternate, I choose LT1431 and LTM4607 as a equivalent. But the pin configuration varies.?

If you don't have a model for MAX8515 and MAX4163, if possible suggest me an alternate IC having LTSPICE model.

Thanks in advance.

M. Rakesh Sharma.


Re: Questions about phase in .AC LTspice Analysis

 

hoa van nguyen wrote:

Vop is complementary from Vom. I ran TRAN-Analysis in this circuit and
confirmed that the outputs are complementary.

What I am really asking is this: Why are the outputs Vop and Vom NOT complementary? ?Maybe you wanted them to be, but they are not, in your .AC analysis. ?The simulated output signals are predominantly common-mode, not differential-mode = complementary.

If they were complementary, then |Vop| and |Vom| would be nearly equal, their phases would be opposite (180 degrees apart), and V(vop,vom) would be larger than either one, rather than smaller. ?None of these things are happening in your .AC simulation.

I think the main reason is that those two bias sources have a large AC component (10 times the magnitude of the actual input signal). ?Why do you have input signals (AC components) entering through three different places into your amplifier circuit? ?I would think that should not be happening, which makes me believe your .AC simulation is not simulating the circuit you think it is.

LTspice is good enough to give you good results, if you give it the right thing to simulate.

Andy



Re: Questions about phase in .AC LTspice Analysis

hoa van nguyen
 

Hello Andy,
Vop is complementary from Vom. I ran TRAN-Analysis in this circuit and
confirmed that the outputs are complementary.

Andy's Q: Did you ever wonder why the two outputs are not complementary? Why there is a 3 dB difference between them? ?And why the differential output, V(vop,vom) is so much smaller than either output alone?

A: I do not know simulator software good enough to answer your question. But
???? I understood in this way:
??? ??? a) Gain equation:? A=20log(Vo/Vi); Vo=output, Vi=input.
??? ??? b) Vop=53.7dB > Ap=4840 ( with Vinp: AC .1); Ap = gain of Vop
???????????? Vom=50.7db > Am=3420???????????????????????????? ; Am = gain of Vom
???????????? It shows that that Vom is complementary of Vop ( Ap > Am).
??? ??? c) Gain of (Vop - Vom) = 42.7dB > Apm=1364

??? ??? d) Ap - Am = 1420 is closed to Apm=1364 which is what I saw in
??????????? TRAN-Analysis ( actually in Tran = 1230) and DC-Analysis.

The schematics which you have are the same what I have and no other
parameters. My most interest is how to see the stability for this circuit in
.AC Analysis

Regards

Hnguyen



On Thursday, December 5, 2013 4:44 PM, hoa van nguyen <hnguyen4280@...> wrote:
?
Hello Jerry,
I understood in this way:
M7/8 are biased to Vinp=Vcm=750mV
Drain voltages of M7/8 are ncr/ncl=589.5mV=590mV
Source voltages of M7/8 are n_src1_2c=345.856mV=346mV
MOS-Threshold VTn=0.2V (with Vbs=0V) in Model;
VTn=0.25V (guessing) (with n_src1_2c=346mV).

Transistor in saturation when Vds_M7/8 >= Vgs - VTn.
Vds_M7/8 = 590mV - 346mV = 244mV
Vgs - VTn = (750mV - 346mV) - 250mV = 154mV

Vds_M7/8 (244mV) >= Vgs - VTn (154mV): M7/8 should be in
saturation and this Cascode Diff. Amplifier should gives high
gain which I saw in TRAN-Analysis.

All Books call this amplifier topology as Cascode Diff. amplifier,
because the transistors are stacked on each other and Diff. is
differential inputs/outputs. Your Guys as Analog Guru understand
Cascode and Diff. in different way. My English and German are not
my native language (I studied in Germany long time ago).

Regards

Hnguyen


On Thursday, December 5, 2013 2:58 PM, Andy wrote:
?
Hnguyen,

I finally was able to download the files and run them.

My results do not look like yours! ?Both of my runs (test1 and test2) look essentially the same as one another, and like your test2 graph but not like your test1 graph.

Did you ever wonder why the two outputs are not complementary? ?Why there is a 3 dB difference between them? ?And why the differential output, V(vop,vom) is so much smaller than either output alone? ?The output signal has a strong common-mode component. ?See the earlier notes about your two other voltage sources which contain an AC component.

I don't know why my test1 plot looks so much different than your test1. ?Are you sure it was from the same schematic as the one you uploaded? ?Either they are not, or perhaps you had different parameters/tolerances set in the Control Panel.

Andy







Re: Questions about phase in .AC LTspice Analysis/but O.T.

 

Did you thought about your web browser ?

Yes. ?I tried two.

or your local provider? Or your keyboard?

Not my local provider. ?Everything else was moving fine.

Not my keyboard. ?I was using my mouse.

(5 minutes to download a 734 Byte file). In anyway:? It¡¯s not a Yahoo¡¯s problem.

I think it was Yahoo's problem. ?The only things affected were files from this Yahoogroup. ?The evidence points to Yahoo.

I don't mean to criticize only Yahoo. ?Everyone has server problems once in a while. ?This time was Yahoo's time.

Andy



Re: Questions about phase in .AC LTspice Analysis

hoa van nguyen
 

Hello Jerry,
I understood in this way:
M7/8 are biased to Vinp=Vcm=750mV
Drain voltages of M7/8 are ncr/ncl=589.5mV=590mV
Source voltages of M7/8 are n_src1_2c=345.856mV=346mV
MOS-Threshold VTn=0.2V (with Vbs=0V) in Model;
VTn=0.25V (guessing) (with n_src1_2c=346mV).

Transistor in saturation when Vds_M7/8 >= Vgs - VTn.
Vds_M7/8 = 590mV - 346mV = 244mV
Vgs - VTn = (750mV - 346mV) - 250mV = 154mV

Vds_M7/8 (244mV) >= Vgs - VTn (154mV): M7/8 should be in
saturation and this Cascode Diff. Amplifier should gives high
gain which I saw in TRAN-Analysis.

All Books call this amplifier topology as Cascode Diff. amplifier,
because the transistors are stacked on each other and Diff. is
differential inputs/outputs. Your Guys as Analog Guru understand
Cascode and Diff. in different way. My English and German are not
my native language (I studied in Germany long time ago).

Regards

Hnguyen


On Thursday, December 5, 2013 2:58 PM, Andy wrote:
?
Hnguyen,

I finally was able to download the files and run them.

My results do not look like yours! ?Both of my runs (test1 and test2) look essentially the same as one another, and like your test2 graph but not like your test1 graph.

Did you ever wonder why the two outputs are not complementary? ?Why there is a 3 dB difference between them? ?And why the differential output, V(vop,vom) is so much smaller than either output alone? ?The output signal has a strong common-mode component. ?See the earlier notes about your two other voltage sources which contain an AC component.

I don't know why my test1 plot looks so much different than your test1. ?Are you sure it was from the same schematic as the one you uploaded? ?Either they are not, or perhaps you had different parameters/tolerances set in the Control Panel.

Andy





Re: Questions about phase in .AC LTspice Analysis/but O.T.

 

From: Andy
Sent: Friday, December 06, 2013 12:12 AM
Subject: Re: [LTspice] Questions about phase in .AC LTspice Analysis/but O.T.
?
?

?
I think you are wrong about that.? Yahoo's servers were delivering only part of the webpage to my web browser.? It was missing all of the actual file listings.? I think it was a temporary problem with Yahoo's servers.? After several hours, it has finally gone back to normal.
?
Today I was reading about a similar kind of problem that someone else is having today with Yahoogroups.? We think that problem is caused by Yahoo's servers too.
?
Late last night I was unable to download files, because they were exceedingly slow (5 minutes to download a 734 Byte file).? This happened only when attempting to download files from this Yahoogroup.? I had no difficulties bringing up the webpages, and no difficulties elsewhere on the web.? It was probably a problem with Yahoo's servers, since that was the only area affected.
?
Andy
.................................................................................................................
Sure: (5 minutes to download a 734 Byte file).?
You are very, very, but very right on this subject.
Nobody has to love Yahoo. And I¡¯m not in love too
Did you thought about your web browser ?
or your local provider? Or your keyboard?
(5 minutes to download a 734 Byte file). In anyway:? It¡¯s not a Yahoo¡¯s problem.
Regards
Ph.
?
?
?


Re: Error log non-sequitur

 

Then I'm a victim of my own habits. I normally use .uic and try to make the power source application look real in order to include start-up behavior in a simulation. My experience was that finding the pre-biased starting point was usually beyond the capability or inclination of the simulator - a big waiting experience with little joy at the end of the wait. I'll give it a shot sometime in the future and see if things improve, at least with simple linear circuits anyways.


Thanks for the help.


In the end it wasn't practical to come up with a single all-inclusive text .asc file to post on S.E.D. I'm not sure that it would have helped, given some of the predelictions of the characters involved.


RL