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Re: Analog MUX
--- In LTspice@..., "polapart <sahawley@m...>"
<sahawley@m...> wrote: I was looking around for a model of a low voltage MUX like theit up and it ran fine with DC control input, but when I attempted tofunctional part model.Hello, unfortunately I don't know any other source of SPICE model for this part. The behaviour looked indeed strange. It was ok with static driven control input, but failed with a pulse source. I already speculated about a problem of LTSpice. The last resort was to sketch the circuit from the netlist through all levels of subcircuits. That was a hard work and I wouldn't have done it, if I hadn't feared a problem of the LTSpice simulator. I found an inverter output connected to no other stage in the used subcircuit LLCN. The subcircuit levels are SWI1 -> LLCN. This circuit contains a first inverter, a two stage level shifter and two more following inverters. The output of the first inverter was connected to no other circuit. Obviously this is wrong. Either MP1 or MP2 has to be connected to node '4'. I supposed MP2. The simulation now runs with pulse sources as expected. Conclusion: There is a bug in this Philips model. This is really a pain and now I have low confidence about the quality of this library. It is in zhree files: Lvnomi.cir, lvfast.cir, lvslow.cir . I suppose to change the line in the .subckt LLCN ... MP2 6 2 50 50 MLVPEN W=135U ....... to MP2 6 4 50 50 MLVPEN W=135U ....... The interested reader can draw the schematic from the netlist. Hope that helps and please next time an easier problem. Best Regards Helmut Original subcircuit in file lvnomi.cir, lvfast.cir and lvslow.cir: ------------------------------------------------------------------ .SUBCKT LLCN 2 3 40 50 60 * LEVEL CONVERTER * INA = 2, OUT = 3, VEE = 40, VCC = 50, GND = 60 MP4 4 2 50 50 MLVPEN W= 30U L= 2.4U AD=120P AS=120P PD= 40U PS= 30U MN4 4 2 60 60 MLVNEN W= 15U L= 2.4U AD= 60P AS= 60P PD= 20U PS= 15U MP1 5 2 50 50 MLVPEN W=135U L= 2.4U AD=500P AS=500P PD=100U PS=135U MP2 6 2 50 50 MLVPEN W=135U L= 2.4U AD=500P AS=500P PD=100U PS=135U MN1 5 6 40 40 MLVNEN W=6.4U L=18.8U AD= 25P AS= 25P PD= 20U PS=6.4U MN2 6 5 40 40 MLVNEN W=6.4U L=18.8U AD= 25P AS= 25P PD= 20U PS=6.4U MP3 7 6 50 50 MLVPEN W= 10U L= 4.0U AD= 40P AS= 40P PD= 20U PS= 10U MN3 7 6 40 40 MLVNEN W= 5U L= 4.0U AD= 20P AS= 20P PD= 10U PS= 5U MP5 3 7 50 50 MLVPEN W= 30U L= 2.4U AD=120P AS=120P PD= 40U PS= 30U MN5 3 7 40 40 MLVNEN W= 15U L= 2.4U AD= 60P AS= 60P PD= 20U PS= 15U .ENDS Corrected subcircuit -------------------- .SUBCKT LLCN 2 3 40 50 60 * LEVEL CONVERTER * INA = 2, OUT = 3, VEE = 40, VCC = 50, GND = 60 MP4 4 2 50 50 MLVPEN W= 30U L= 2.4U AD=120P AS=120P PD= 40U PS= 30U MN4 4 2 60 60 MLVNEN W= 15U L= 2.4U AD= 60P AS= 60P PD= 20U PS= 15U MP1 5 2 50 50 MLVPEN W=135U L= 2.4U AD=500P AS=500P PD=100U PS=135U *** Changed node '2' to '4' in the next line *** MP2 6 4 50 50 MLVPEN W=135U L= 2.4U AD=500P AS=500P PD=100U PS=135U MN1 5 6 40 40 MLVNEN W=6.4U L=18.8U AD= 25P AS= 25P PD= 20U PS=6.4U MN2 6 5 40 40 MLVNEN W=6.4U L=18.8U AD= 25P AS= 25P PD= 20U PS=6.4U MP3 7 6 50 50 MLVPEN W= 10U L= 4.0U AD= 40P AS= 40P PD= 20U PS= 10U MN3 7 6 40 40 MLVNEN W= 5U L= 4.0U AD= 20P AS= 20P PD= 10U PS= 5U MP5 3 7 50 50 MLVPEN W= 30U L= 2.4U AD=120P AS=120P PD= 40U PS= 30U MN5 3 7 40 40 MLVNEN W= 15U L= 2.4U AD= 60P AS= 60P PD= 20U PS= 15U .ENDS |
Analog MUX
polapart <[email protected]>
I was looking around for a model of a low voltage MUX like the
74lv4051. I found a a 6 pin fragment in the Philips LV library () called SWI1. I wired it up and it ran fine with DC control input, but when I attempted to toggle the switch with a square wave, once it turned off it never turned on again. Any ideas what's going on here and or pointers to a fully functional part model. Thanks SH |
Re: Hierarchical schematics
--- In LTspice@..., Panama Mike <panamatex@y...> wrote:
Hello Mike,I put up a version today(2.00t) that enables nestedMany thanks for your help. I moved the Spice thank you very much for the work on solving the .lib problem in lower level hierarchy. Version 2.00x now works with the configuration from Ron, too. It is now no longer necessary to put the .include or .lib statement to the top level. Best Regards Helmut Let me sketch the three level hierarchy for the people interested: ------------------------------------------------------------------ Top: Level-1 schematic: ressitors, instance of level-2 Next Level-2: instance of level-3, resistors, opamp.asy .include opamp.sub Next Level-3: transistors, diodes, G-sources |
Re: Digest Number 23
Peter Kapas
Hi Neil /New user: how to edit digital models?
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Show quoted text
----------------------------------------------- Try these: CD4093.asc ------------------------------------------------ Version 4 SHEET 1 892 692 WIRE 288 304 304 304 WIRE 160 320 112 320 WIRE 160 256 112 256 WIRE 160 272 128 272 WIRE 128 272 128 352 WIRE 128 352 160 352 WIRE 160 352 160 336 WIRE 160 352 240 352 WIRE 240 352 240 320 WIRE 160 352 160 368 FLAG 112 256 a IOPIN 112 256 In FLAG 112 320 b IOPIN 112 320 In FLAG 304 304 c IOPIN 304 304 Out FLAG 160 368 gnd IOPIN 160 368 BiDir SYMBOL C:\Program\ Files\LTC\SwCADIII\Digital\and 256 224 R0 WINDOW 3 0 0 Invisible 0 SYMATTR Value Vlow=.1 Vhigh={VDD} SYMATTR InstName A1 SYMATTR Value2 Trise=2n Tfall=2n SYMBOL C:\Program\ Files\LTC\SwCADIII\Digital\schmtbuf 160 192 R0 WINDOW 3 8 60 Invisible 0 SYMATTR Value Vt={Vtt} Vh={Vhh} Trise=10n Tfall=10n SYMATTR InstName A2 SYMATTR Value2 Vlow=.1 Vhigh={VDD} Td=193n SYMBOL C:\Program\ Files\LTC\SwCADIII\Digital\schmtbuf 160 256 R0 WINDOW 3 17 89 Invisible 0 SYMATTR Value Vt={Vtt} Vh={Vhh} Trise=10n Tfall=10n SYMATTR InstName A3 SYMATTR Value2 Vlow=.1 Vhigh={VDD} Td=193n ------------------------------------------------ CD4093.asy ------------------------------------------------ Version 4 SymbolType BLOCK LINE Normal 16 -32 -32 -32 LINE Normal 17 32 -32 32 LINE Normal -32 32 -32 -32 LINE Normal 0 -16 16 -16 LINE Normal -8 16 0 -16 LINE Normal -16 16 -8 16 LINE Normal 0 16 -8 16 LINE Normal 8 -16 0 16 CIRCLE Normal 64 8 48 -8 ARC Normal -15 -32 48 32 17 32 16 -32 WINDOW 0 49 -42 Left 0 WINDOW 1 66 28 Left 0 PIN -32 -16 NONE 8 PINATTR PinName a PINATTR SpiceOrder 1 PIN -32 16 NONE 8 PINATTR PinName b PINATTR SpiceOrder 2 PIN 64 0 NONE 8 PINATTR PinName c PINATTR SpiceOrder 3 PIN 0 32 NONE 8 PINATTR PinName gnd PINATTR SpiceOrder 4 ------------------------------------------- and finally an example: Relax.asc ------------------------------------------- Version 4 SHEET 1 900 700 WIRE 80 -80 160 -80 WIRE 160 -80 160 48 WIRE 160 48 112 48 WIRE 16 32 -16 32 WIRE -80 32 -80 96 WIRE 16 64 -16 64 WIRE -16 64 -16 32 WIRE -16 32 -80 32 WIRE -16 32 -16 -80 WIRE -16 -80 0 -80 WIRE -80 192 -80 176 WIRE -80 176 48 176 WIRE -80 176 -80 160 WIRE 48 176 48 80 FLAG -80 192 0 SYMBOL C:\Program\ Files\LTC\SwCADIII\DC4093 48 48 R0 SYMATTR InstName U1 SYMATTR SpiceLine k=3 VDD=5*k Vtt=2.4*k Vhh=.532*k SYMBOL cap -96 96 R0 SYMATTR InstName C1 SYMATTR Value 1n SYMBOL res 96 -96 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 20k TEXT -100 216 Left 0 !.tran 1000u ------------------------------------------- ----- Original Message -----
From: <LTspice@...> To: <LTspice@...> Sent: Saturday, February 15, 2003 1:39 AM Subject: [LTspice] Digest Number 23 To unsubscribe from this group, send an email to: LTspice-unsubscribe@... ------------------------------------------------------------------------ There are 4 messages in this issue. Topics in this digest: 1. Some basic uestions From: Massimo Gaspari <gaspari@...> 2. Re: Some basic uestions From: Panama Mike <panamatex@...> 3. New user: how to edit digital models? From: "neel_christian <neel_c@...>" <neel_c@...> 4. Re: New user: how to edit digital models? From: "Helmut Sennewald <helmutsennewald@...>" <helmutsennewald@...> ________________________________________________________________________ ________________________________________________________________________ Message: 1 Date: Fri, 14 Feb 2003 21:41:24 +0100 From: Massimo Gaspari <gaspari@...> Subject: Some basic uestions Hi everybody, I am a new user of LTSpice. Looking into the model list I am not able to find the models for a semiconducor (diffused) resistors and capacitors. They are not very important but some netlists are using them. Are these models available in LTSpice? They are standard models in Berkeley Spice3, may be useful to add them for compatibility. Is there an upper limit for the numeber of components in the standard.* libraries (diode,resistor,capacitor...)? Using the .STEP statement it seems difficult to analyze the different waveforms because it is not possible (is it right?) to understand which value of the parameter is related with a particular waveform. Is there a way to show which value is used with any waveforms? Regards Massimo -- ''~`` ( o o ) +------------------.oooO--(_)--Oooo.------------------+ | | | e-mail: gaspari@... | | | | ICQ # = 166939207 | | | | PGP fingerprint16: | | 76 80 F2 F9 8D 70 F3 D1 42 2B CD 80 29 49 CB 25 | | | | .oooO | | ( ) Oooo. | +---------------------\ (----( )--------------------+ \_) ) / (_/ ________________________________________________________________________ ________________________________________________________________________ Message: 2 Date: Fri, 14 Feb 2003 13:10:50 -0800 (PST) From: Panama Mike <panamatex@...> Subject: Re: Some basic uestions Looking into the model list I am not able to findthe models for a semiconductor (diffused) resistors andYou can use the standard resistor and capacitors model statements. It should be able to understand both Berkeley and PSpice syntax. Is there an upper limit for the number of components(diode,resistor,capacitor...)? Absolutely not, but there isn't any facility there you help you organize your models. If you wish, you can also keep your own libraries separate and include them by putting a SPICE directive on the schematic of the form ".lib <filenamepath>" Using the .STEP statement it seems difficult toYes, it can be difficult. You can navigate an attached cursor from one dataset to the next with the up/down keyboard cursor keys. --Mike __________________________________________________ Do you Yahoo!? Yahoo! Shopping - Send Flowers for Valentine's Day ________________________________________________________________________ ________________________________________________________________________ Message: 3 Date: Fri, 14 Feb 2003 23:25:22 -0000 From: "neel_christian <neel_c@...>" <neel_c@...> Subject: New user: how to edit digital models? Hello Group, I discovered LTSpice a few days ago and I find it very usefull, fun and easy-to-use :-) I am now trying to use mixed-mode simulation, and I cannot edit nor see the models of simple parts like DFLOP (I just want to modify Hold Time, Threshold, etc.). I did it easily for simple analog parts (like nmos,pmos), but no way to find a file (even after a search in the help files and FAQ) for digital parts...maybe I should buy new glasses. A Hint? Thank you in advance for your help Christian Nel ________________________________________________________________________ ________________________________________________________________________ Message: 4 Date: Sat, 15 Feb 2003 00:00:07 -0000 From: "Helmut Sennewald <helmutsennewald@...>" <helmutsennewald@...> Subject: Re: New user: how to edit digital models? --- In LTspice@..., "neel_christian <neel_c@c...>" <neel_c@c...> wrote: Hello Group,fun and easy-to-use :-)Hold Time, Threshold, etc.). I did it easily for simple analog parts(like nmos,pmos), but no way to find a file (even after a search in theHello Christian, new glasses wouldn't help. I had the same question half a year ago. The developer of LTSpice, Mike Engelhardt, kindky send me the necessary information. By the way, he is around here in the group as Panama Mike, but keep it for yourself. It is a secret. The attached sample circuit helps to understand the syntax. This file is also from Mike. Hello Mike, are there even more parameters for digital parts? Best Regards Helmut Original answer from Mike: -------------------------- The low and high levels are given with Vlow and Vhigh. The logic thresholds default to half way between but can be specified with ref. Hysteresis is not possible for gates, but only for the Schmitt devices. Attached is and example that hopefully illustrates. Tripdt is a type of temporal accuracy it should strive for in switching. Sample circuit file "gate.asc": ------------------------------- Version 3 SHEET 1 892 692 WIRE 408 304 408 320 WIRE 420 292 436 292 WIRE 420 300 520 300 WIRE 344 356 344 340 WIRE 344 320 344 296 WIRE 344 296 404 296 WIRE 520 300 520 308 WIRE 520 328 520 340 WIRE 408 244 408 260 WIRE 420 232 436 232 WIRE 404 236 344 236 WIRE 344 236 344 296 WIRE 344 236 344 200 WIRE 344 200 404 200 WIRE 420 200 452 200 WIRE 404 204 404 212 FLAG 408 320 GND FLAG 344 356 GND FLAG 520 340 GND FLAG 408 260 GND FLAG 404 212 GND SYMBOL digital\and 412 280 R0 WINDOW 0 4 6 Left 0 WINDOW 3 4 28 Left 0 WINDOW 39 4 44 Left 0 WINDOW 40 4 52 Left 0 WINDOW 123 4 36 Left 0 SYMATTR InstName A1 SYMATTR Value Vhigh=5 SYMATTR Value2 Vlow=0 Rout=100 SYMATTR SpiceModel AND SYMATTR SpiceLine Ref=2 Td=50n tripdt=3n SYMATTR SpiceLine2 Trise=20n Tfall=40n SYMBOL voltage 344 316 R0 WINDOW 0 6 4 Left 0 WINDOW 3 6 26 Left 0 SYMATTR InstName V1 SYMATTR Value pulse(0 5 0 100n 100n 0 200n) SYMBOL res 516 304 R0 WINDOW 0 9 10 Left 0 WINDOW 3 9 19 Left 0 SYMATTR InstName R1 SYMATTR Value 1K SYMBOL digital\and 412 220 R0 WINDOW 0 4 6 Left 0 WINDOW 3 4 28 Left 0 WINDOW 39 4 44 Left 0 WINDOW 40 4 52 Left 0 WINDOW 123 4 36 Left 0 SYMATTR InstName A2 SYMATTR Value Vhigh=5 SYMATTR Value2 Vlow=0 Rout=100 SYMATTR SpiceModel AND SYMATTR SpiceLine Ref=2 Td=50n tripdt=3n SYMATTR SpiceLine2 Tau=10n SYMBOL digital\schmtbuf 404 184 R0 WINDOW 0 2 8 Left 0 WINDOW 3 5 24 Left 0 WINDOW 123 5 32 Left 0 SYMATTR InstName A3 SYMATTR Value Vt=2.5 Vh=1 SYMATTR Value2 tripdt=3n SYMATTR SpiceModel SCHMITT text 328 368 Left 0 !.tran 1u ________________________________________________________________________ ________________________________________________________________________ Your use of Yahoo! Groups is subject to |
Re: New user: how to edit digital models?
--- In LTspice@..., "neel_christian <neel_c@c...>"
<neel_c@c...> wrote: --- In LTspice@..., "Helmut Sennewald >is,The attached sample circuit helps to understand the syntax.Thank you very much Helmut, using Mikes's example.Hello Christian, I forgot a very important detail. You have to specify some delay Td for every flipflop. All my simulated counters and flipflops have run as expected only when I specified a delay for every flipflop(e.g. Td=10ns). Your FSM(Finite State Machine) has flipflops and so you have to add this value "Td=xx" to your flipflops. See also the Td parameter in the last gate exmple. Best Regards Helmut |
Re: New user: how to edit digital models?
--- In LTspice@..., "Helmut Sennewald >
The attached sample circuit helps to understand the syntax.Thank you very much Helmut, In the meantime, I debugged my digital design (a simple FSM) on another mixed-mode simulator (evaluation version of Microcap). Now I'll try to implement it with LTSpice where my main analog design is, using Mikes's example. Probably more feedback at the end of the week-end. Best regards Christian |
Re: New user: how to edit digital models?
--- In LTspice@..., "neel_christian <neel_c@c...>"
<neel_c@c...> wrote: Hello Group,fun and easy-to-use :-)Hold Time, Threshold, etc.). I did it easily for simple analog parts(like nmos,pmos), but no way to find a file (even after a search in theHello Christian, new glasses wouldn't help. I had the same question half a year ago. The developer of LTSpice, Mike Engelhardt, kindky send me the necessary information. By the way, he is around here in the group as Panama Mike, but keep it for yourself. It is a secret. The attached sample circuit helps to understand the syntax. This file is also from Mike. Hello Mike, are there even more parameters for digital parts? Best Regards Helmut Original answer from Mike: -------------------------- The low and high levels are given with Vlow and Vhigh. The logic thresholds default to half way between but can be specified with ref. Hysteresis is not possible for gates, but only for the Schmitt devices. Attached is and example that hopefully illustrates. Tripdt is a type of temporal accuracy it should strive for in switching. Sample circuit file "gate.asc": ------------------------------- Version 3 SHEET 1 892 692 WIRE 408 304 408 320 WIRE 420 292 436 292 WIRE 420 300 520 300 WIRE 344 356 344 340 WIRE 344 320 344 296 WIRE 344 296 404 296 WIRE 520 300 520 308 WIRE 520 328 520 340 WIRE 408 244 408 260 WIRE 420 232 436 232 WIRE 404 236 344 236 WIRE 344 236 344 296 WIRE 344 236 344 200 WIRE 344 200 404 200 WIRE 420 200 452 200 WIRE 404 204 404 212 FLAG 408 320 GND FLAG 344 356 GND FLAG 520 340 GND FLAG 408 260 GND FLAG 404 212 GND SYMBOL digital\and 412 280 R0 WINDOW 0 4 6 Left 0 WINDOW 3 4 28 Left 0 WINDOW 39 4 44 Left 0 WINDOW 40 4 52 Left 0 WINDOW 123 4 36 Left 0 SYMATTR InstName A1 SYMATTR Value Vhigh=5 SYMATTR Value2 Vlow=0 Rout=100 SYMATTR SpiceModel AND SYMATTR SpiceLine Ref=2 Td=50n tripdt=3n SYMATTR SpiceLine2 Trise=20n Tfall=40n SYMBOL voltage 344 316 R0 WINDOW 0 6 4 Left 0 WINDOW 3 6 26 Left 0 SYMATTR InstName V1 SYMATTR Value pulse(0 5 0 100n 100n 0 200n) SYMBOL res 516 304 R0 WINDOW 0 9 10 Left 0 WINDOW 3 9 19 Left 0 SYMATTR InstName R1 SYMATTR Value 1K SYMBOL digital\and 412 220 R0 WINDOW 0 4 6 Left 0 WINDOW 3 4 28 Left 0 WINDOW 39 4 44 Left 0 WINDOW 40 4 52 Left 0 WINDOW 123 4 36 Left 0 SYMATTR InstName A2 SYMATTR Value Vhigh=5 SYMATTR Value2 Vlow=0 Rout=100 SYMATTR SpiceModel AND SYMATTR SpiceLine Ref=2 Td=50n tripdt=3n SYMATTR SpiceLine2 Tau=10n SYMBOL digital\schmtbuf 404 184 R0 WINDOW 0 2 8 Left 0 WINDOW 3 5 24 Left 0 WINDOW 123 5 32 Left 0 SYMATTR InstName A3 SYMATTR Value Vt=2.5 Vh=1 SYMATTR Value2 tripdt=3n SYMATTR SpiceModel SCHMITT text 328 368 Left 0 !.tran 1u |
New user: how to edit digital models?
Hello Group,
I discovered LTSpice a few days ago and I find it very usefull, fun and easy-to-use :-) I am now trying to use mixed-mode simulation, and I cannot edit nor see the models of simple parts like DFLOP (I just want to modify Hold Time, Threshold, etc.). I did it easily for simple analog parts (like nmos,pmos), but no way to find a file (even after a search in the help files and FAQ) for digital parts...maybe I should buy new glasses. A Hint? Thank you in advance for your help Christian N¨¦el |
Re: Some basic uestions
Looking into the model list I am not able to findthe models for a semiconductor (diffused) resistors andYou can use the standard resistor and capacitors model statements. It should be able to understand both Berkeley and PSpice syntax. Is there an upper limit for the number of components(diode,resistor,capacitor...)? Absolutely not, but there isn't any facility there you help you organize your models. If you wish, you can also keep your own libraries separate and include them by putting a SPICE directive on the schematic of the form ".lib <filenamepath>" Using the .STEP statement it seems difficult toYes, it can be difficult. You can navigate an attached cursor from one dataset to the next with the up/down keyboard cursor keys. --Mike __________________________________________________ Do you Yahoo!? Yahoo! Shopping - Send Flowers for Valentine's Day |
Some basic uestions
Hi everybody,
I am a new user of LTSpice. Looking into the model list I am not able to find the models for a semiconducor (diffused) resistors and capacitors. They are not very important but some netlists are using them. Are these models available in LTSpice? They are standard models in Berkeley Spice3, may be useful to add them for compatibility. Is there an upper limit for the numeber of components in the standard.* libraries (diode,resistor,capacitor...)? Using the .STEP statement it seems difficult to analyze the different waveforms because it is not possible (is it right?) to understand which value of the parameter is related with a particular waveform. Is there a way to show which value is used with any waveforms? Regards Massimo -- ''~`` ( o o ) +------------------.oooO--(_)--Oooo.------------------+ | | | e-mail: gaspari@... | | | | ICQ # = 166939207 | | | | PGP fingerprint16: | | 76 80 F2 F9 8D 70 F3 D1 42 2B CD 80 29 49 CB 25 | | | | .oooO | | ( ) Oooo. | +---------------------\ (----( )--------------------+ \_) ) / (_/ |
Re: Need a model for a gas discharge tube (spark gap) and general help.
I need a model for a gas discharge tube similar to the Siemens A81-Try Their may be something there you can use. Regards Brian -- Brian Howie | Tel: 0131 343 5590 BAE SYSTEMS | Fax: 0131 343 5050 Sensor Systems Division | Email brian.howie@... Silverknowes | bhowie@... Edinburgh EH4 4AD | Web site www.baesystems.com |
Re: Need a model for a gas discharge tube (spark gap) and general help.
--- In LTspice@..., "Helmut Sennewald
<helmutsennewald@y...>" <helmutsennewald@y...> wrote: --- In LTspice@..., "bunnyblues2001 Thanks for the quick response. I have a few datasheets for different devices. I don't now what parameters I'll need but not knowing has never stopped me from giving it a shot. |
Re: Need a model for a gas discharge tube (spark gap) and general help.
--- In LTspice@..., "bunnyblues2001
<bunnyblues2001@y...>" <bunnyblues2001@y...> wrote: I need a model for a gas discharge tube similar to the Siemens A81-comes with LTSpice but found out I have to supply my own model. Any hints Hello, are you referencing this model? It contains lines with non LTSpice syntax. These lines have to be modified. Do you have a datasheet or any SPICE parameter? Best Regards Helmut |
Need a model for a gas discharge tube (spark gap) and general help.
I need a model for a gas discharge tube similar to the Siemens A81-
C90X, if anyone can help I'd appreciate it. I have just started to use LTSpice and would like to know if there is any information out there that shows how to convert a manufactures model to something that will keep LTSpice happy. I was hoping to use the DIAC that comes with LTSpice but found out I have to supply my own model. Any hints for a day-old user how to do this? So far it's a cool program. |
Re: Hierarchical schematics
I put up a version today(2.00t) that enables nestedMany thanks for your help. I moved the Spice subcircuit definitions. Initial tests suggest the parameter passing is properly scoped. Please report any problems or crashes as soon as you detect them. --Mike __________________________________________________ Do you Yahoo!? Yahoo! Shopping - Send Flowers for Valentine's Day |
Re: Noise source in Transient analysis
#NOISE
--- In LTspice@..., "gm4dij <brian.howie@b...>"
<brian.howie@b...> wrote: --- In LTspice@..., Panama Mike <panamatex@y...> wrote:randomYou might be able to use the rand() functionrand and white on their own are no use -these are rectangular variables.attempt to do this. You will need to alter these, and the time step to getHello Brian, thanks for the formula. I googled and found this reference. I couldn't resist to test it immediately in LTSPICE. I have got some extremely high peaks(30V) at 47us, 48us and 84us with the setting ".tran 0 100000n 0 0.5n". So the formula needs a little change to avoid extreme values at log(0). The original formula: V=SQRT(-2*LN(white(time*1.07G)+0.5))*COS(2*PI*(white(time*0.93G+0.5))) My slightly modified formula for LTSpice: V=SQRT(-2*LN(0.999997*white(time*1.07e9) +0.50001))*COS(2*PI*white (time*0.93e9+0.5)) This B-source doesn't have the above mentioned "defects". Best Regards Helmut |
Re: Noise source in Transient analysis
#NOISE
gm4dij <[email protected]>
--- In LTspice@..., Panama Mike <panamatex@y...> wrote:
You might be able to use the rand() functionrand and white on their own are no use -these are rectangular random variables. Use a behavioural voltage source with V for example V=SQRT(-2*LN(white(time*1.07G)+0.5))*COS(2*PI*(white ((time*0.93G+0.5))) This is the Box-Mueller algorithm for Gaussian Noise. You need two independent random variables. The factors 1.07 and 0.93 is an attempt to do this. You will need to alter these, and the time step to get what you want. You also may need to scale to get the correct rms value in your noise bandwidth. It's not perfect. Brian Howie Do you Yahoo!? |
Re: Hierarchical schematics
Many thanks for your help. I moved the Spice a few minutes ago I sent Mike Engelhardt thisOh, yes. That is awkward. I'll see if I can't improve on this. The situation comes about historically because while the academic codes often do allow nested subcircuit definitions, the commercial codes do not. However, the commercial codes allow subcircuit parameters to be passed, which is usually more useful. Anyway, LTspice follows the commercial standards. Maybe I can make it follow a superset language. --Mike __________________________________________________ Do you Yahoo!? Yahoo! Mail Plus - Powerful. Affordable. Sign up now. |
Re: Hierarchical schematics
seems rather awkward to have to remember to put all hierarchical Hello Ron, a few minutes ago I sent Mike Engelhardt this question and asked him to answer into this thread at the YAHOO-LTSpice group. Best Regards Helmut |
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