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--- In LTspice@..., John M Woodgate <jmw@...> wrote:

In message <j57d86+fkkg@...>, Charly Engineering
<charly020664@...> writes

my LTspice-version has problems with that circuit :-)

You need to .lib arachnid.mod, which you can download from the Web.
--
This is my travelling signature, adding no superfluous mass.
John M Woodgate

Thanx John, I will spend the rest of this day with searching the lib .lib ararchnid.mod.

I think the best is to search in www3.

best regards ...

--- In LTspice@..., "Tony Casey" <tony@...> wrote:

You might investigate whether GaN FETs would do the job for you. Check out:


.. for example.

Regards,
Tony

Yes, GaN FETs are perhaps godd for that. I've thought about that. They are good, if they have a large input resistance and low input capacity.

I will check that.

best regards ...

--- In LTspice@..., "Tony Casey" <tony@...> wrote:

<snip>

Hi Tony and others,
Three more questions:
1) If prefix for an nmos.asy symbol is stated as MN, what does that mean?
2) Could you also try to explain what an intrinsic model is, I don't think I exactly understand that?
3) Is it possible to place a model elsewhere than under the &#92;lib&#92;sub folder or schematic folder besides from an website?

Regards
Carsten

</snip>
Hello Carsten,

1. The MN prefix tells SPICE that the device is an N-channel MOSFET.
2. An intrinsic device is a fancy name for a circuit element that is built in to the SPICE code. Please read the LTspice>Circuit Elements section of the Help for a complete list.
3. It is frequently recommended to avoid placing any user files in any part of installation tree, particularly if you expect to have to share simulation files with co-workers etc (it may also be overwritten in an update if Mike introduces a file of the same name - unlikely, but possible). This is because you cannot everyone else will have the same files there; you should only assume they will have the installation defaults. The advice is therefore to place any user files (.models, subcircuits, .meas scripts) in the folder containing the top level schematic. LTspice will always find them there. In principle, you can place a model anywhere if you provide an absolute path to the file in the .inc statement, but it's asking for trouble. Nevertheless, people continue to ignore the advice.

Regards,
Tony

Hi Tony,
Thank you for your fine and quick answer. I don't have any further questions, I think I understand :-).
Regards
Carsten

In message <j57d86+fkkg@...>, Charly Engineering <charly020664@...> writes

my LTspice-version has problems with that circuit :-)

You need to .lib arachnid.mod, which you can download from the Web.
--
This is my travelling signature, adding no superfluous mass.
John M Woodgate

--- In LTspice@..., "Charly Engineering" <charly020664@...> wrote:

Hi folks,

my LTspice-version has problems with that circuit :-)

help!

best regards Leo ...

Hello Leo,

To my mind the ideal device for your circuit is the old VMP4 - a first generation VMOSFET from Siliconix from about 25years ago. These devices had a remarkable combination of properties, but I believe they also had spectacularly low manufacturing yield due to the V groove. Otherwise, their descendants might still be with us. Does anyone have more info on this?

You might investigate whether GaN FETs would do the job for you. Check out:


.. for example.

Regards,
Tony

gasoltroll wrote:

A collegue suggested that I put the parasitics of the kapacitor in discrete
components in series, and that fixed the problem. Bug?

What that probably did was move the series inductance so it is no
longer in parallel with the (unspecified but non-zero by default)
parallel capacitance, Cpar.

Andy

Helmut wrote:

Equivalent parallel capacitance(Cpar): 0p

Interesting. This is one of those cases where the default value is
not zero, but the Help doesn't tell you this. Judging by the Help, I
would have thought that the default would be zero.

Someone needs to make the Help more helpful!

Andy

--- In LTspice@..., "boid_twitty" <legg@...> wrote:

Tube life is related more to the temperature of their envelope, if the heater is reliably constructed.



I'm not sure that you can assume a more reliable tube technology, post 1960. A fifty year old piece of equipment has not demonstrated a 50 year component life.......

RL

... I've never seen that, he must have had the idea for the radiator in the second of my birth or he had no wood for his fireplace at home ....

best regards Leo...

Tube life is related more to the temperature of their envelope, if the heater is reliably constructed.



I'm not sure that you can assume a more reliable tube technology, post 1960. A fifty year old piece of equipment has not demonstrated a 50 year component life.......

RL

Hi folks,

my LTspice-version has problems with that circuit :-)

help!

best regards Leo ...

<snip>

Hi Tony and others,
Three more questions:
1) If prefix for an nmos.asy symbol is stated as MN, what does that mean?
2) Could you also try to explain what an intrinsic model is, I don't think I exactly understand that?
3) Is it possible to place a model elsewhere than under the &#92;lib&#92;sub folder or schematic folder besides from an website?

Regards
Carsten

</snip>
Hello Carsten,

1. The MN prefix tells SPICE that the device is an N-channel MOSFET.
2. An intrinsic device is a fancy name for a circuit element that is built in to the SPICE code. Please read the LTspice>Circuit Elements section of the Help for a complete list.
3. It is frequently recommended to avoid placing any user files in any part of installation tree, particularly if you expect to have to share simulation files with co-workers etc (it may also be overwritten in an update if Mike introduces a file of the same name - unlikely, but possible). This is because you cannot everyone else will have the same files there; you should only assume they will have the installation defaults. The advice is therefore to place any user files (.models, subcircuits, .meas scripts) in the folder containing the top level schematic. LTspice will always find them there. In principle, you can place a model anywhere if you provide an absolute path to the file in the .inc statement, but it's asking for trouble. Nevertheless, people continue to ignore the advice.

Regards,
Tony

--- In LTspice@..., Tan Micheline Tambayong <micheline.tambayong@...> wrote:

Hi Helmut,
Thanks for the reply. I already uploaded the file under name
Pefficiency_analysis.asc.
Please try to simulate the power in V1 and power in R1 since I am analyzing
the Power efficiency (Pout/Pin) of the circuit. Also if you try to simulate
using C = 16uF it's simulating just fine but it gives error when you try C =
17uF... You can try other value of C as well. It gives error for only some
values of C above 16uF.
Hope you can find out why it behaves as such..
Thanks so much for the help

Kind regards,
Micheline


On Mon, Sep 19, 2011 at 4:32 PM, Helmut <helmutsennewald@...> wrote:

**




--- In LTspice@..., Tan Micheline Tambayong
<micheline.tambayong@> wrote:

Does anyone know what its means when LTspice give error:
"Singular matrix: check node n002
Iteration No. 1"

The circuit is made by AC voltage source, resistor (series with the

voltage

source), bridge rectifier, capacitor, resistor paralleled with the

capacitor

as a load at the output, and ground. The circuit is plotting and

simulating

just fine for small value of capacitor. But when I increase the capacitor
value above 16uF, LTspice give the above error. But for some capacitor
values (eg. 20uF) it's fine again, and when I increase it again

(eg.21uF),

it gives error again. So LTspice gives error for most of capacitor value
above 16uF but not all.. Also, for some value, it simulating but then the
plot stops in the middle. The value of the capacitor that gives an ok

plot

and error are randoms (no pattern). So does anyone know, what's the

reason

that the LTspice behaves like this?

Thanks in advance..

Kind regards,
Micheline

Hello Micheline,

This error message simply means that LTspice couldn't solve
the matrix. Maybe your circuit has an open nets.

Please upload your circuit to this group for a test to the
following location.

Files > Temp > yourcircuit.asc



Best regards,
Helmut

Hello Micheline,

Your circuit won't converge because of the ideal diode model. If you add Roff=10Meg to the model, it fixes the convergence issue.

Regards,
Tony

--- In LTspice@..., "Tony Casey" <tony@...> wrote:

--- In LTspice@..., "pindsen" <windven@> wrote:

--- In LTspice@..., "Helmut" <helmutsennewald@> wrote:

--- In LTspice@..., "pindsen" <windven@> wrote:

Hi,

I need an BSS138 in my LTSpice simulation.
Since I can't find that component in the program itself, I need to make it.

I have done the following steps but LTspice won't simulate:

1) Downloaded a Zetex BSS138 spice subcircuit and placed it in a "BSS138.sub" file
2) The spice file is placed in c:&#92;program files&#92;LTC&#92;LTspiceIV&#92;lib&#92;sub
3) Included a nmos symbol (nmos.asy) in the design
4) Renamed the symbol to BSS138/ZTX
5) Add a spice directive command ".inc BSS138.sub"
6) Hit the run button
7) LTspice can't simulate and says "Can't find definition of model "bss138".

The Zetex spice model can be seen here:

*ZETEX BSS138 Spice Mosfet Subcircuit Last revision 11/91
*
.SUBCKT BSS138/ZTX 3 4 5
* Nodes D G S
M1 3 2 5 5 MOD1
RG 4 2 343
RL 3 5 6E6
D1 5 3 DIODE1
.MODEL MOD1 NMOS VTO=1.109 RS=1.474 RD=1.59 IS=1E-15 KP=0.597
+CGSO=23.5P CGDO=4.5P CBD=53.5P PB=1 LAMBDA=267E-6
.MODEL DIODE1 D IS=1.254E-13 N=1.0207 RS=0.222
.ENDS

Can anyone help?

Best regards
Carsten Wind
Denmark

Hello Carsten,

4a)
Ctrl-right-mouse-click on the placed symbol nmos.
Change Prefix:MN to Prefix:X

2) I always recommend to save model files in the folder of the
schematic.

Best regards,
Helmut

Hello Helmut,
Thanx for your answer.
I did what you proposed in 4a) and it worked :-) But what does it do? What is Prefix and what does a change from MN to X do?

Then, how should the .include statement look like if the model files is placed in the folder of the schematic?

Best regards
Carsten Wind

Hello Carsten,

The X prefix tells the SPICE netlister that the device is represented by a subcircuit, and not an intrinsic model.

If the subcircuit is placed in the same directory as the schematic, then the include line is simply:
.inc subcircuitfilename.ext

Regards,
Tony

Hi Tony and others,
Three more questions:
1) If prefix for an nmos.asy symbol is stated as MN, what does that mean?
2) Could you also try to explain what an intrinsic model is, I don't think I exactly understand that?
3) Is it possible to place a model elsewhere than under the &#92;lib&#92;sub folder or schematic folder besides from an website?

Regards
Carsten

--- In LTspice@..., "Heinz-W. Schockenbaum" <schockenbaum@...> wrote:

Which german newsgrop?

de.sci.electronics, You can have plenty of knowledge, first You will get canings :-)

best regards Leo ...

--- In LTspice@..., "Randoid" <randoid@...> wrote:

Has Mike Engelhardt ever expressed interest in taking a poll of us users on this forum for improvements that we would like to see? Seems like a natural fit to me.

There is something I would like different, but have always been so grateful for LTspice that I didn't want to rock the boat;

In the schematic editor, it is not possible to pan far (or sometimes at all) past the extent of the existing schematic.

For example, imagine that I have the output of a circuit and want to add some load to it. Often I end up zooming right out so I can see to the right and then place a GND somewhere over there so I can zoom in again and place my new bits.

If you copy a block of circuit, it gets even worse as you try to pan past the existing circuit, and LTspice says "oh no you don't!" and bounces back. Sometimes I place a few GND points around and then have to move the entire schematic over a bit to make space on one side to extend it.

I also like analoguespiceman's suggestion, and would like to have this feature added to a number of other applications that I use :)

A collegue suggested that I put the parasitics of the kapacitor in discrete components in series, and that fixed the problem. Bug?

/Johan

Hiya Mike

Now that I have well over 100 different diode types in Ltspice I think that something that I would find useful would be a selector box for diode type "All, Germanium, Silicon, ZENER, SCHOTTKY, VARACTOR, LED" above the select window.

A filter search where you could type in the first couple of characters of the diode ID for instance 1N or BZY which then only displays those models that match the filter.

Regarding Ltspice recognised added parameters Vpk, Ipk, Iave, Irms and diss it would be nice to add 'Cv4' which gave the capacitance of a Varactor when negatively biased at -4 volts

Thus when the select box has 'Varactor' selected it would display the Vpk and Cv4 of the device. When the others are selected the display should be as it is now.


The text editor.

I have spent some time using the test editor, and have found that it does have a quirk, that is that it switches from insert mode to overtype when text is pasted into the file being edited.

Adding mouse select and move would be nice too.


Overall


It's a damn fine program, and wouldn’t dream of using any other for spice. Keep up the excellent work. Thank you


Best regards

Suusi Malcolm-Brown

--- In LTspice@..., Michael Peter Kiwanuka <michael883575@...> wrote:

Could you please post the circuit schematics, Symbols, and models and all relevant files in the Temp files of this group ? It is a lot easier with a schematic to troubleshoot.

Schematic is uploaded, but the calculation is missing.
Temporary P(in) is zero (as capacitor is already loaded and I(in) is zero.)

That may cause a division by zero.

hws

--- In LTspice@..., Tan Micheline Tambayong <micheline.tambayong@...> wrote:

I already uploaded the file under name Pefficiency_analysis.asc.

Methode how to calculate efficiency is missing.

Please notice that R1 is not connected to gnd. I suppose you calculated like this: voltage should be: V(n003)-V(n004). Current is I(R1) so power is (V(n003)-V(n004))*I(R1)
Divide Output power by input power?...

Your uploaded simulation works for me.

hws

Hi Micheline,

Could you please post the circuit schematics, Symbols, and models and all relevant files in the Temp files of this group ? It is a lot easier with a schematic to troubleshoot.

Best regards,

Michael




To: LTspice@...
From: micheline.tambayong@...
Date: Mon, 19 Sep 2011 15:21:03 +1000
Subject: [LTspice] SPICE Error






Does anyone know what its means when LTspice give error:
"Singular matrix: check node n002
Iteration No. 1"

The circuit is made by AC voltage source, resistor (series with the voltage
source), bridge rectifier, capacitor, resistor paralleled with the capacitor
as a load at the output, and ground. The circuit is plotting and simulating
just fine for small value of capacitor. But when I increase the capacitor
value above 16uF, LTspice give the above error. But for some capacitor
values (eg. 20uF) it's fine again, and when I increase it again (eg.21uF),
it gives error again. So LTspice gives error for most of capacitor value
above 16uF but not all.. Also, for some value, it simulating but then the
plot stops in the middle. The value of the capacitor that gives an ok plot
and error are randoms (no pattern). So does anyone know, what's the reason
that the LTspice behaves like this?

Thanks in advance..

Kind regards,
Micheline

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[Non-text portions of this message have been removed]