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I'm toying with an OpAmp design that ultimately shall amplify and clip a sinusoidal voltage (100Vp, 100kHz, 10x Amplification), nothing special except the slew rates are quite high. Now, to verify the functionality that comes _after_ the OpAmp, I've used a behavioural voltage source that I would expect performs exactly the function I want: limit(10 * V(Vin), 0, 10).

However, when looking at the simulation, I see that the behavioural voltage source starts to rise _before_ V(in) crosses zero. I would post an image, but cannot.?

What causes this behaviour? Can it be fixed??

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My Version of LTSpice is 17.1.5 for MacOSX.?

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Thanks a lot for your input and cheers,

It looks to me like your issue is a limited number of data points and/or plot compression. You don't seem to have set a maximum time step, so LTspice is guessing when data points should be. Change your .TRAN directive to something like:

.TRAN 0 50u 0 1n

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Rather than trying to post an image, upload your .ASC and all other files required to run it. to Files -> Temp and then tell us you did that.

Hi all,

I'm toying with an OpAmp design that ultimately shall amplify and clip a sinusoidal voltage (100Vp, 100kHz, 10x Amplification), nothing special except the slew rates are quite high. Now, to verify the functionality that comes _after_ the OpAmp, I've used a behavioural voltage source that I would expect performs exactly the function I want: limit(10 * V(Vin), 0, 10).

However, when looking at the simulation, I see that the behavioural voltage source starts to rise _before_ V(in) crosses zero. I would post an image, but cannot.?

What causes this behaviour? Can it be fixed??

?

My Version of LTSpice is 17.1.5 for MacOSX.?

?

Thanks a lot for your input and cheers,

Joerg

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Here is the a

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Thanks, Tony, it's clearer now. And I have tried plotting gd(Vout)*w/2*Pi on the right-hand axis and it seems to work. At least there was no error message and a credible plot.

How so? I described two different operations. In the first, you plot V(out) and the display defaults magnitude (left) and phase (right axis). You can optionally change the right axis representation from phase to group delay, as described.

Separately, in addition to plotting V(out) and getting 2 different representations, you can also plot ph(V(out)) and just get phase displayed on the left axis. But you can't similarly plot gd(V(out)), as there is no gd() function. And you can't get around that by plotting d(ph(V(out))) instead, as it's not supported.

--
Regards,
Tony

On 14/05/2025 10:33, John Woodgate via groups.io wrote:

HI, Tony. I don't understand. The second sentence appears to contradict the first one.

On 2025-05-14 09:23, Tony Casey via groups.io wrote:

You can change the right hand axis (in .AC analysis) to display group delay instead of phase by: Right-click > Representation = Group Delay.

Unfortunately, you can't plot gd(V(out))

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How so? I described two different operations. In the first, you plot V(out) and the display defaults magnitude (left) and phase (right axis). You can optionally change the right axis representation from phase to group delay, as described.

Separately, in addition to plotting V(out) and getting 2 different representations, you can also plot ph(V(out)) and just get phase displayed on the left axis. But you can't similarly plot gd(V(out)), as there is no gd() function. And you can't get around that by plotting d(ph(V(out))) instead, as it's not supported.

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HI, Tony. I don't understand. The second sentence appears to contradict the first one.

You can change the right hand axis (in .AC analysis) to display group delay instead of phase by: Right-click > Representation = Group Delay.

Unfortunately, you can't plot gd(V(out))

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Hi, Kendall,

From 'Waveform arithmetic' (WA) in the re-designed Help:

The keyword "time" is understood when plotting transient analysis waveform data. Similarly, "omega" is understood when plotting data from an AC analysis. "w" can be used as a synonym for omega.

You can thus plot group delay and then use WA to plot GD*w/2Pi. But I have not tried it.

Hi all - quick bedtime question - I need to plot the group delay of a circuit multiplied by the frequency.? Too tired to work out how to do it, nothing I've tried has worked.? Is there a natty little trick in the plot window?? Thanks -- K

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Hi all - quick bedtime question - I need to plot the group delay of a circuit multiplied by the frequency.? Too tired to work out how to do it, nothing I've tried has worked.? Is there a natty little trick in the plot window?? Thanks -- K

Sorry - missed your bedtime. But if you still need the answer today, read on.

You can change the right hand axis (in .AC analysis) to display group delay instead of phase by: Right-click > Representation = Group Delay.

Unfortunately, you can't plot gd(V(out)) as you can - say ph(V(out)). Neither can you plot d(ph(V(out))) - an irritating little box pops up telling you: "Ph() differentiation is not supported. Use the waveform viewer group delay display feature."

There you have it.

--
Regards,
Tony

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I am trying to model the Ep10 core with T38 material from TDK micronas

I have modelled the core but I am not sure whether it is correct or not ?

How do I check my model ? Also it would be good if you could tell me if there are any pre defined core models for this

Group member Alexander Bordodynov (Александр Бордодынов) has modelled a number of non-linear cores, and has a core library. I have no idea whether the one you wish to use is one of them, but it's a good place to look.

When you say you have modelled the core, what exactly do you mean? Is it modelled in LTspice, or some other way? For a number of suggestions, you could go to the Group's Files section and perform a search for "non-linear core". That will give 19 hits, including 3 contributions from Alex.

It is also worth looking at the . Alex has contributed a large library that is linked . I'm not sure if it contains the core models, or whether they are available somewhere else. Please read the chapter headed "A note on portability of these "permanent" LTspice Components", before installing this large library. There is also a section contributed by the late Analogspiceman entitled , but towards the end, there are some examples of using the LTspice non-linear Chan core model, which is also described in the LTspice Help.

It is also possible to model a specific non-linear inductor by using the built-in flux inductor model, which is also described in the Help, along with the Chan model.

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LTspice doesn't have any built-in models and processes for modelling magnetic circuits in the way you need. It would be possible to write the necessary files, but it would be a major project.

Hi ,?

Thanks for the reply

But I want to model it in SPICE model editor and use it in my circuit ,?

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Routinely thanking the Internet spirits for the wayback machine, which is incredibly useful -- until it isn't.

Donald.

[snip]

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I think you might try the FEMM (Finite Element Magnetic Modelling) /g/femm/ group for this question.

That group is dedicated to such issues. Transformers in LTspice are (except for the Chan model, about which I can't really speak) are simple linear devices with primary and secondary inductance and some parasitic parameters.

Hope this helps,
Donald.

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My remarks refer specifically to EDN's Design Ideas.

This is an extract from the official:

Design Ideas Submission Guide

What about images and CAD schematics?
We strongly encourage?CAD-generated?schematics. If you don’t have access to commercial software, there are many free alternatives, such as:

• , , Digi-Key’s , & (online design (and sometimes simulation) websites)

• & (open-source EDA systems)

• , , & (commercial programs with free versions)

On the web site, images can be 600 pixels wide, maximum. If you can make your schematic legible at this size, perfect. If not, we’ll link it to a larger version. Don’t worry about downsizing images. We do that.

I can provide the complete guide for anyone interested, but it's not hard to find on the EDN site.

My recent experience is that most schematics are now author-provided. Transcription errors were always common in technical publications, precisely because diagrams got re-drawn by people who weren't familiar (enough) with the topic, something familiar to people that had to deal with traditional Drawing Offices.

On a general note, it isn't just EDN where it is often impossible to locate things that appeared some time ago. Websites undergo constant change and traceability is often compromised.

On Mon, May 12, 2025 at 04:54 AM, Tony Casey wrote:

This is a recent article, and I know from experience that the EDN editors encourage writers to supply their own diagrams, at least for their "Design Ideas". ...

Perhaps I remember incorrectly.? But I thought all circuit diagrams in EDN articles were re-drawn by EDN's editors.? I do not recall seeing author-drawn schematics in their "Design Ideas" or elsewhere.

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EDN's resources are extremely unreliable, in my opinion.? Try finding any article older than a couple of years old, with figures and comments intact.? What's worse, when you point it out to EDN, they can't find it either.? They are a black hole of electronics knowledge.

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I often see replies by authors, pointing out the mistakes EDN made when publishing their article.? Occasionally EDN actually gets it right, but their track record for accuracy is not good.