Re: Simulation runs very slowly: test.asc
? The LT1083 comes in my standard library. If I substitute it for the LM317, I get no error messages. The PSRR is till poorer for OUT2. ? Do you still think configuring V1 as I did is incorrect? ? ?
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Show quoted text
From: [email protected] <[email protected]> On Behalf Of John Woodgate via groups.io
Sent: Sunday, April 6, 2025 11:32 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? Your LM317A_TRANS symbol has the path on your computer to the model hard-coded in its Attributes. OK, that can be fixed, but you should be aware of this pesky feature that causes trouble every time someone autogenerates a symbol. I doubt that you can use an .AC sim, because that assumes linearity. Keep V1 as the DC source and add a sine source in series, then run a .TRAN sim. You can .STEP the sine frequency. On 2025-04-06 16:02, Christopher Paul via groups.io wrote: John, ? Apologies. AC source enabled and .lib and .asy files supplied. ProgCurrSource_Corr uploaded. ? Comments below still apply. ? Thank you, Tony. ? Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc. ? The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ. ? The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB. ? With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results: ? Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 Direct Newton iteration for .op point succeeded.
|
Re: Simulation runs very slowly: test.asc
Your LM317A_TRANS symbol has the path on your computer to the model
hard-coded in its Attributes. OK, that can be fixed, but you
should be aware of this pesky feature that causes trouble every
time someone autogenerates a symbol.
I doubt that you can use an .AC sim, because
that assumes linearity. Keep V1 as the DC source and add a sine
source in series, then run a .TRAN sim. You can .STEP the sine
frequency.
On 2025-04-06 16:02, Christopher Paul
via groups.io wrote:
John,
?
Apologies.
AC source enabled and .lib and .asy files supplied.
ProgCurrSource_Corr uploaded.
?
Comments
below still apply.
?
Thank
you, Tony.
?
Here’s
the problem I encountered with the unmodified LM317A_TRANS
while hoping to use the DC current source I1 to create a
programmable current source. See ProgCurrSource.asc.
?
The
drop across Rc leaves only 12.5mV across Rs, leading to a
10mA current through RL. There are no AC currents flowing
through either ADJ or through Rc, and there is no DC
current through ADJ.
?
The
PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At
OUT1, the same PSRR is 55dB.
?
With
LTspice 17.1.14, simulating with .ac dec 100 10 10000
yields the following errors, although it also obviously
produces the above results:
?
Questionable
use of curly braces in "b§e_abmgate yint 0
v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"
???
Error: undefined symbol in:
"if([v](a)>((vthresh)),((vdd)),((vss)))"
Questionable
use of curly braces in "b§e_abmgate yint 0
v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"
???
Error: undefined symbol in:
"if([v](a)>((vthresh)),((vdd)),((vss)))"
u2:_u1_u12:dd1:
Emission coefficient, N=2.6437e-312, too small, limited
to 0.1
u2:_u1_u11:dd1:
Emission coefficient, N=2.6437e-312, too small, limited
to 0.1
u1:_u1_u12:dd1:
Emission coefficient, N=2.6437e-312, too small, limited
to 0.1
u1:_u1_u11:dd1:
Emission coefficient, N=2.6437e-312, too small, limited
to 0.1
Direct
Newton iteration for .op point succeeded.
?
--
OOO - Own Opinions only
If something is true:
* as far as we know - it's science
*for certain - it's mathematics
*unquestionably - it's religion
|
Re: Simulation runs very slowly: test.asc
John, ? Apologies. AC source enabled and .lib and .asy files supplied. ProgCurrSource_Corr uploaded. ? Comments below still apply. ?
toggle quoted message
Show quoted text
Thank you, Tony. ? Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc. ? The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ. ? The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB. ? With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results: ? Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 Direct Newton iteration for .op point succeeded. ?
|
If you want to keep track of voltage nets or nodes, you can give them a label name such as a or b, or in or out.? And use those names if you want.
|
Re: Simulation runs very slowly: test.asc
You didn't upload the LM317 model. Your 12 V
DC source doesn't have a sine wave superimposed. You do that by
adding a sine generator in series. You can probably disregard
the warnings abut curly braces.
The Undefined Symbol errors are due to bad
syntax in the expression, probably [v](a).
The Errors about the value of N are probably
due to syntax error; N doesn't mean what LTspice thinks it
means. The value is not sensible anyway.
On 2025-04-06 14:57, Christopher Paul
via groups.io wrote:
Thank
you, Tony.
?
Here’s
the problem I encountered with the unmodified LM317A_TRANS
while hoping to use the DC current source I1 to create a
programmable current source. See ProgCurrSource.asc.
?
The drop
across Rc leaves only 12.5mV across Rs, leading to a 10mA
current through RL. There are no AC currents flowing through
either ADJ or through Rc, and there is no DC current through
ADJ.
?
The PSRR
at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1,
the same PSRR is 55dB.
?
With
LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields
the following errors, although it also obviously produces
the above results:
?
Questionable
use of curly braces in "b§e_abmgate yint 0
v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"
???
Error: undefined symbol in:
"if([v](a)>((vthresh)),((vdd)),((vss)))"
Questionable
use of curly braces in "b§e_abmgate yint 0
v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"
???
Error: undefined symbol in:
"if([v](a)>((vthresh)),((vdd)),((vss)))"
u2:_u1_u12:dd1:
Emission coefficient, N=2.6437e-312, too small, limited to
0.1
u2:_u1_u11:dd1:
Emission coefficient, N=2.6437e-312, too small, limited to
0.1
u1:_u1_u12:dd1:
Emission coefficient, N=2.6437e-312, too small, limited to
0.1
u1:_u1_u11:dd1:
Emission coefficient, N=2.6437e-312, too small, limited to
0.1
Direct
Newton iteration for .op point succeeded.
?
?
?
?
?
On 04/04/2025 23:51, Christopher Paul via
groups.io wrote:
There
are at least two unencrypted models I saw today:
LM317_TRANS (No note on PSRR) and a more extensive model
LM317A_TRANS, which states:
?
* Model
Usage Notes:
*
* A.
Features have been modelled
*?????????
1. Startup Response
*?????????
2. Peak Current Limit
*?????????
3. Dropout Voltage vs Output Current?
*?????????
4. Line & Load Transinet (sic) Response
*
* B.
Features haven't been modelled
*?????????
1. Quiescent Current vs Input Voltage
*?????????
2. Temperature dependent characteristics
*?????????
3. PSRR Response
?
If the
more extensive model says no to PSRR, I don’t hold out
hope for the less extensive one.
The notes in the LM317A model are nonsense.
PSRR is modelled, although it doesn't quite stack up with the
datasheet, which states 68dB (typ) - the model delivers -55dB.
For comparison, for the LM317, the datasheet figure is 57dB
and the model delivered 62dB. The model behaviour overall is
better than for the LM317, which doesn't model the output
capacitor effect on PSRR. In the LM317A, it is modelled. The
LM317A PSRR figure for when a 10uF capacitor is hung on the
ADJ pin can't be achieved.
What doesn't seem to be modelled is the effect of the load
current on PSRR. Maybe this is what the notes were supposed to
cover.
The two transistor level models don't model current limiting
correctly - it kicks in at ~800mA with some foldback, whereas
the two TI behavioural models limit at ~2.2A, but with no
foldback. None of them will have limiting modelled fully,
because it is determined by Tj in the actual device. The
LM317A behavioural model doesn't implement
temperature-dependent limiting at all, whereas the LM317
version does, but the analysis explodes at 75?C.
Conclusion: all the models are flawed, but the TI LM317A model
is the most reliable. I modified it so the inherent PSRR was
68dB, as per the TI datasheet Figure 10, and it showed the
additional 10uF capacitor on the ADJ pin lowers this to 85dB,
although Figure 10 suggests it should be closer to 82dB. These
are close enough.
I didn't test the other characteristics.
--
Regards,
Tony
--
OOO - Own Opinions only
If something is true:
* as far as we know - it's science
*for certain - it's mathematics
*unquestionably - it's religion
|
Re: Simulation runs very slowly: test.asc
I thought I made a mistake, but I was wrong ! ? Please do consider the email time stamped 9:58AM below. ?
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Show quoted text
From: christopherrpaul1@... <christopherrpaul1@...>
Sent: Sunday, April 6, 2025 10:05 AM
To: [email protected]
Subject: RE: [LTspice] Simulation runs very slowly: test.asc? Please ignore, I see a problem with what I did. ? ? Thank you, Tony. ? Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc. ? The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ. ? The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB. ? With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results: ? Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 Direct Newton iteration for .op point succeeded. ? ? ? ? ? On 04/04/2025 23:51, Christopher Paul via groups.io wrote: There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states: ? * Model Usage Notes: * * A. Features have been modelled *????????? 1. Startup Response *????????? 2. Peak Current Limit *????????? 3. Dropout Voltage vs Output Current? *????????? 4. Line & Load Transinet (sic) Response * * B. Features haven't been modelled *????????? 1. Quiescent Current vs Input Voltage *????????? 2. Temperature dependent characteristics *????????? 3. PSRR Response ? If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.
The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.
What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.
The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.
Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.
I didn't test the other characteristics.
--
Regards,
Tony
|
Re: Simulation runs very slowly: test.asc
Please ignore, I see a problem with what I did. ?
toggle quoted message
Show quoted text
From: [email protected] <[email protected]> On Behalf Of Christopher Paul via groups.io
Sent: Sunday, April 6, 2025 9:58 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? Thank you, Tony. ? Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc. ? The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ. ? The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB. ? With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results: ? Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 Direct Newton iteration for .op point succeeded. ? ? ? ? ? On 04/04/2025 23:51, Christopher Paul via groups.io wrote: There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states: ? * Model Usage Notes: * * A. Features have been modelled *????????? 1. Startup Response *????????? 2. Peak Current Limit *????????? 3. Dropout Voltage vs Output Current? *????????? 4. Line & Load Transinet (sic) Response * * B. Features haven't been modelled *????????? 1. Quiescent Current vs Input Voltage *????????? 2. Temperature dependent characteristics *????????? 3. PSRR Response ? If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.
The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.
What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.
The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.
Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.
I didn't test the other characteristics.
--
Regards,
Tony
|
Re: Simulation runs very slowly: test.asc
Thank you, Tony. ? Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc. ? The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ. ? The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB. ? With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results: ? Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}" ??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))" u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1 Direct Newton iteration for .op point succeeded. ? ? ? ?
toggle quoted message
Show quoted text
From: [email protected] <[email protected]> On Behalf Of Tony Casey via groups.io
Sent: Sunday, April 6, 2025 9:22 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? On 04/04/2025 23:51, Christopher Paul via groups.io wrote: There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states: ? * Model Usage Notes: * * A. Features have been modelled *????????? 1. Startup Response *????????? 2. Peak Current Limit *????????? 3. Dropout Voltage vs Output Current? *????????? 4. Line & Load Transinet (sic) Response * * B. Features haven't been modelled *????????? 1. Quiescent Current vs Input Voltage *????????? 2. Temperature dependent characteristics *????????? 3. PSRR Response ? If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.
The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.
What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.
The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.
Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.
I didn't test the other characteristics.
--
Regards,
Tony
|
Re: Simulation runs very slowly: test.asc
On 06/04/2025 15:22, Tony Casey wrote:
The
notes in the LM317A model are nonsense. PSRR is modelled, although
it doesn't quite stack up with the datasheet, which states 68dB
(typ) - the model delivers -55dB. For comparison, for the LM317,
the datasheet figure is 57dB and the model delivered 62dB. The
model behaviour overall is better than for the LM317, which
doesn't model the output capacitor effect on PSRR. In the LM317A,
it is modelled. The LM317A PSRR figure for when a 10uF capacitor
is hung on the ADJ pin can't be achieved.
Correction: the TI LM317 datasheet Figure 8 shows about 65dB at
25?C, not 57dB, which is over all temperatures. But Figure 8 is not
reliable, because it shows the additional 10uF capacitor on ADJ
makes the PSRR worse, not better. Perhaps the labelling of traces is
switched? Not good, TI.
--
Regards,
Tony
|
Re: Simulation runs very slowly: test.asc
On 06/04/2025 15:18, Rene via groups.io
wrote:
why i have a
feeling that i just crashed on idiots planet
Other planets are available.
--
Regards,
Tony
|
Re: Simulation runs very slowly: test.asc
On 04/04/2025 23:51, Christopher Paul
via groups.io wrote:
There are
at least two unencrypted models I saw today: LM317_TRANS (No
note on PSRR) and a more extensive model LM317A_TRANS, which
states:
?
* Model
Usage Notes:
*
* A.
Features have been modelled
*?????????
1. Startup Response
*?????????
2. Peak Current Limit
*?????????
3. Dropout Voltage vs Output Current?
*?????????
4. Line & Load Transinet (sic) Response
*
* B.
Features haven't been modelled
*?????????
1. Quiescent Current vs Input Voltage
*?????????
2. Temperature dependent characteristics
*?????????
3. PSRR Response
?
If the more
extensive model says no to PSRR, I don’t hold out hope for the
less extensive one.
The notes in the LM317A model are nonsense. PSRR is modelled,
although it doesn't quite stack up with the datasheet, which states
68dB (typ) - the model delivers -55dB. For comparison, for the
LM317, the datasheet figure is 57dB and the model delivered 62dB.
The model behaviour overall is better than for the LM317, which
doesn't model the output capacitor effect on PSRR. In the LM317A, it
is modelled. The LM317A PSRR figure for when a 10uF capacitor is
hung on the ADJ pin can't be achieved.
What doesn't seem to be modelled is the effect of the load current
on PSRR. Maybe this is what the notes were supposed to cover.
The two transistor level models don't model current limiting
correctly - it kicks in at ~800mA with some foldback, whereas the
two TI behavioural models limit at ~2.2A, but with no foldback. None
of them will have limiting modelled fully, because it is determined
by Tj in the actual device. The LM317A behavioural model doesn't
implement temperature-dependent limiting at all, whereas the LM317
version does, but the analysis explodes at 75?C.
Conclusion: all the models are flawed, but the TI LM317A model is
the most reliable. I modified it so the inherent PSRR was 68dB, as
per the TI datasheet Figure 10, and it showed the additional 10uF
capacitor on the ADJ pin lowers this to 85dB, although Figure 10
suggests it should be closer to 82dB. These are close enough.
I didn't test the other characteristics.
--
Regards,
Tony
|
Re: Simulation runs very slowly: test.asc
why i have a feeling that i just crashed on idiots planet
|
Re: Simulation runs very slowly: test.asc
Ah, of course.? "Datasheet" makes sense.
?
Andy
?
|
Re: Simulation runs very slowly: test.asc
On 06/04/2025 11:09, Andy I via
groups.io wrote:
What is "the d/s compatibility"?
?
"d/s" suggests "Drain/Source".? But this is a bipolar device,
so it lacks a Drain and Source, so what does it mean?? Sorry, I
do not understand your cryptic abbreviations.
I took?"d/s" to Datasheet. But I could be wrong.
--
Regards,
Tony
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Re: Simulation runs very slowly: test.asc
On Sun, Apr 6, 2025 at 05:00 AM, Rene wrote:b
??? the d/s compatibility // i haven't tested
What is "the d/s compatibility"?
?
"d/s" suggests "Drain/Source".? But this is a bipolar device, so it lacks a Drain and Source, so what does it mean?? Sorry, I do not understand your cryptic abbreviations.
?
Andy
?
?
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Re: Simulation runs very slowly: test.asc
?
?it turns out that as they claim there and exists an LT317A device model at [PowerProducts]
?
??? the d/s compatibility // i haven't tested
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Re: Simulation runs very slowly: test.asc
I’d be interested in whatever you find, and hope that the transistor-based model you mentioned and I saw works more like an actual LM317. ?
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From: [email protected] <[email protected]> On Behalf Of Tony Casey via groups.io
Sent: Saturday, April 5, 2025 5:28 PM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? On 05/04/2025 20:27, Christopher Paul via groups.io wrote: Thanks Tony. Yes, there’s the LT3080 and its ilk as well as many others. Appreciate your forthcoming effort in checking what you have and uploading it.
I didn't check the LM317A. I hadn't appreciated this was a new device. Traditionally, the "A" suffix denoted a tightened tolerance of the basic device. More recently, TI started using it for completely different new versions of legacy devices. Not smart and quite misleading. I'll check that the new model But given that PSRR is stated to be not modelled, I hardly see the point of it.
Sometimes I think that people lose the plot. (If you'll pardon the pun.) ?
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Re: Simulation runs very slowly: test.asc
On 05/04/2025 20:27, Christopher Paul
via groups.io wrote:
Thanks Tony.
Yes, there’s the LT3080 and its ilk as well as many others.
Appreciate your forthcoming effort in checking what you have and
uploading it.
I didn't check the LM317A. I hadn't appreciated this was a new
device. Traditionally, the "A" suffix denoted a tightened tolerance
of the basic device. More recently, TI started using it for
completely different new versions of legacy devices. Not smart and
quite misleading. I'll check that the new model But given that PSRR
is stated to be not modelled, I hardly see the point of it.
Sometimes I think that people lose the plot. (If you'll pardon the
pun.)
--
Regards,
Tony
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Re: Simulation runs very slowly: test.asc
Thanks Tony. Yes, there’s the LT3080 and its ilk as well as many others. Appreciate your forthcoming effort in checking what you have and uploading it. ?
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From: [email protected] <[email protected]> On Behalf Of Tony Casey via groups.io
Sent: Friday, April 4, 2025 6:46 PM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? On 04/04/2025 23:51, Christopher Paul via groups.io wrote: There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states: ? * Model Usage Notes: * * A. Features have been modelled *????????? 1. Startup Response *????????? 2. Peak Current Limit *????????? 3. Dropout Voltage vs Output Current? *????????? 4. Line & Load Transinet (sic) Response * * B. Features haven't been modelled *????????? 1. Quiescent Current vs Input Voltage *????????? 2. Temperature dependent characteristics *????????? 3. PSRR Response ? If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.
The other ones I have are decent enough. I'll check them against the datasheet, before uploading anything.
TBH, you can do a lot better than the LM317 these days. ?
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Re: Simulation runs very slowly: test.asc
Agree with the “precise” correction. ? To make a current source, a positive supply is connected to the LM317’s IN pin, a resistor R is connected between OUT and ADJ, and the ADJ pin is connected to a grounded load. Here R = 1.25V / ILoad, where ILoad is the desired load current. This two-component current source circuit has only two connections to the outside world. Excite the source at IN and measure the load current, or put an excited voltage source in series with the load and measure the current that flows when the ADJ source is a simple DC voltage (accounting for the load impedance); PSRR (ohms) is the same as the impedance seen by the load. ? For my simulation, I used?LM317A current_source.zip??Current source circuit, using TI's own LM317A model which I found in the User Group files along with others. I could go into detail about why PSRR is not working properly if you wish. ? At some point I’m going try the more promising transistor model?LM317_Test.zip?Working test schematic of LM317, symbol and model originally uploaded by Jason Vanryan. Performance not verified against datasheet. ? Chris ? ? ?
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From: [email protected] <[email protected]> On Behalf Of Andy I via groups.io
Sent: Friday, April 4, 2025 6:28 PM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc? On Fri, Apr 4, 2025 at 05:46 PM, Christopher Paul wrote: The problem is that the notes in the T.I. model specifically state that it is NOT applicable to PSRR.
To be more precise, it says that PSRR Response "hasn't been modelled", whatever that means.? It might mean only that the effect may be there but nobody has calibrated or checked it yet for conformance with the specs.? But I'm guessing that it is more than that. The lack of mention of PSRR in the LM317 (not -A) model doesn't imply that PSRR is correctly modeled there.? Unfortunately, it doesn't mean anything.??No way to tell without trying it. ... And since the standard LM317 one-resistor current source is essentially a two-terminal device, PSRR (characterized as supply voltage divided by load current) is identical to Zout, so that’s out the window too.
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John Woodgate
Dan
Tony Casey
Rene