开云体育


Re: Simulation runs very slowly: test.asc

 

开云体育

I fixed all the anomalies in the TI LM317A model, so there are no errors or warnings. I also implemented the small changes in PSRR.

The reason your 2 circuits deliver different results is that 2nd one isn't functioning properly due to the current source I1. This causes the ADJ pin to go below ground and the O/P pin to reach 353mV. I added the LOAD parameter to spec of I1 - this prevents non-physical behaviour.

The analysis runs instantaneously in XVII, 24.0.12 and 24.1.5. Check that you have reset you SPICE parameters to default.

Try my upload: ProgCurrSource_corr_ATC.zip

Note:
  1. Symbol modified to remove hard-coded ModelFile attribute.
  2. Modified TI model to remove errors and adjust PSRR to match datasheet.
  3. Also, it is now possible to plot the dissipation of the LM317A. Previously, this was not possible because the ADJ pin had no internal termination.
--
Regards,
Tony

On 06/04/2025 15:57, Christopher Paul via groups.io wrote:

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.

?

?



Re: Simulation on LTspice about of Power Quality and Energy Efficient

 

开云体育

To help you, we meed more information. What sort of circuits are you studying? Switch-mode power supplies? RF amplifiers? Washing machines?

On 2025-04-06 17:16, mmartine via groups.io wrote:
Hello , My name is Mario Martinez , i want to know about sumulation circuits of squematics what represented for analisys of energy quality and energy efficient , i am ecuatorian
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


Re: Simulation runs very slowly: test.asc

 

开云体育

OK, thanks, I’ll try it.

?

From: [email protected] <[email protected]> On Behalf Of John Woodgate via groups.io
Sent: Sunday, April 6, 2025 12:20 PM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

Yes, because that only works for .AC simulation, which assumes that everything is linear, and that is unlikely to give you the correct result for PSRR.

On 2025-04-06 17:01, Christopher Paul via groups.io wrote:

Do you still think configuring V1 as I did is incorrect?


Re: Simulation runs very slowly: test.asc

 

开云体育

Yes, because that only works for .AC simulation, which assumes that everything is linear, and that is unlikely to give you the correct result for PSRR.

On 2025-04-06 17:01, Christopher Paul via groups.io wrote:
Do you still think configuring V1 as I did is incorrect?
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


Simulation on LTspice about of Power Quality and Energy Efficient

 

Hello , My name is Mario Martinez , i want to know about sumulation circuits of squematics what represented for analisys of energy quality and energy efficient , i am ecuatorian


Re: Simulation runs very slowly: test.asc

 

开云体育

?

The LT1083 comes in my standard library. If I substitute it for the LM317, I get no error messages. The PSRR is till poorer for OUT2.

?

Do you still think configuring V1 as I did is incorrect?

?

?

From: [email protected] <[email protected]> On Behalf Of John Woodgate via groups.io
Sent: Sunday, April 6, 2025 11:32 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

Your LM317A_TRANS symbol has the path on your computer to the model hard-coded in its Attributes. OK, that can be fixed, but you should be aware of this pesky feature that causes trouble every time someone autogenerates a symbol.

I doubt that you can use an .AC sim, because that assumes linearity. Keep V1 as the DC source and add a sine source in series, then run a .TRAN sim. You can .STEP the sine frequency.

On 2025-04-06 16:02, Christopher Paul via groups.io wrote:

John,

?

Apologies. AC source enabled and .lib and .asy files supplied. ProgCurrSource_Corr uploaded.

?

Comments below still apply.

?

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.


Re: Simulation runs very slowly: test.asc

 

开云体育

Your LM317A_TRANS symbol has the path on your computer to the model hard-coded in its Attributes. OK, that can be fixed, but you should be aware of this pesky feature that causes trouble every time someone autogenerates a symbol.

I doubt that you can use an .AC sim, because that assumes linearity. Keep V1 as the DC source and add a sine source in series, then run a .TRAN sim. You can .STEP the sine frequency.

On 2025-04-06 16:02, Christopher Paul via groups.io wrote:

John,

?

Apologies. AC source enabled and .lib and .asy files supplied. ProgCurrSource_Corr uploaded.

?

Comments below still apply.

?

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.

?

--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


Re: Simulation runs very slowly: test.asc

 

开云体育

John,

?

Apologies. AC source enabled and .lib and .asy files supplied. ProgCurrSource_Corr uploaded.

?

Comments below still apply.

?

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.

?


Re: .MEAS scripting

 

If you want to keep track of voltage nets or nodes, you can give them a label name such as a or b, or in or out.? And use those names if you want.


Re: Simulation runs very slowly: test.asc

 

开云体育

You didn't upload the LM317 model. Your 12 V DC source doesn't have a sine wave superimposed. You do that by adding a sine generator in series. You can probably disregard the warnings abut curly braces.

The Undefined Symbol errors are due to bad syntax in the expression, probably [v](a).

The Errors about the value of N are probably due to syntax error; N doesn't mean what LTspice thinks it means. The value is not sensible anyway.

On 2025-04-06 14:57, Christopher Paul via groups.io wrote:

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.

?

?

?

?

From: [email protected] <[email protected]> On Behalf Of Tony Casey via groups.io
Sent: Sunday, April 6, 2025 9:22 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

On 04/04/2025 23:51, Christopher Paul via groups.io wrote:

There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states:

?

* Model Usage Notes:

*

* A. Features have been modelled

*????????? 1. Startup Response

*????????? 2. Peak Current Limit

*????????? 3. Dropout Voltage vs Output Current?

*????????? 4. Line & Load Transinet (sic) Response

*

* B. Features haven't been modelled

*????????? 1. Quiescent Current vs Input Voltage

*????????? 2. Temperature dependent characteristics

*????????? 3. PSRR Response

?

If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.

The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.

What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.

The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.

Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.

I didn't test the other characteristics.

--
Regards,
Tony

--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


Re: Simulation runs very slowly: test.asc

 

开云体育

I thought I made a mistake, but I was wrong !

?

Please do consider the email time stamped 9:58AM below.

?

From: christopherrpaul1@... <christopherrpaul1@...>
Sent: Sunday, April 6, 2025 10:05 AM
To: [email protected]
Subject: RE: [LTspice] Simulation runs very slowly: test.asc

?

Please ignore, I see a problem with what I did.

?

From: [email protected] <[email protected]> On Behalf Of Christopher Paul via groups.io
Sent: Sunday, April 6, 2025 9:58 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.

?

?

?

?

From: [email protected] <[email protected]> On Behalf Of Tony Casey via groups.io
Sent: Sunday, April 6, 2025 9:22 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

On 04/04/2025 23:51, Christopher Paul via groups.io wrote:

There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states:

?

* Model Usage Notes:

*

* A. Features have been modelled

*????????? 1. Startup Response

*????????? 2. Peak Current Limit

*????????? 3. Dropout Voltage vs Output Current?

*????????? 4. Line & Load Transinet (sic) Response

*

* B. Features haven't been modelled

*????????? 1. Quiescent Current vs Input Voltage

*????????? 2. Temperature dependent characteristics

*????????? 3. PSRR Response

?

If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.

The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.

What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.

The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.

Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.

I didn't test the other characteristics.

--
Regards,
Tony


Re: Simulation runs very slowly: test.asc

 

开云体育

Please ignore, I see a problem with what I did.

?

From: [email protected] <[email protected]> On Behalf Of Christopher Paul via groups.io
Sent: Sunday, April 6, 2025 9:58 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.

?

?

?

?

From: [email protected] <[email protected]> On Behalf Of Tony Casey via groups.io
Sent: Sunday, April 6, 2025 9:22 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

On 04/04/2025 23:51, Christopher Paul via groups.io wrote:

There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states:

?

* Model Usage Notes:

*

* A. Features have been modelled

*????????? 1. Startup Response

*????????? 2. Peak Current Limit

*????????? 3. Dropout Voltage vs Output Current?

*????????? 4. Line & Load Transinet (sic) Response

*

* B. Features haven't been modelled

*????????? 1. Quiescent Current vs Input Voltage

*????????? 2. Temperature dependent characteristics

*????????? 3. PSRR Response

?

If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.

The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.

What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.

The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.

Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.

I didn't test the other characteristics.

--
Regards,
Tony


Re: Simulation runs very slowly: test.asc

 

开云体育

Thank you, Tony.

?

Here’s the problem I encountered with the unmodified LM317A_TRANS while hoping to use the DC current source I1 to create a programmable current source. See ProgCurrSource.asc.

?

The drop across Rc leaves only 12.5mV across Rs, leading to a 10mA current through RL. There are no AC currents flowing through either ADJ or through Rc, and there is no DC current through ADJ.

?

The PSRR at the OUT2 terminal below 100Hz is a measly 25dB. At OUT1, the same PSRR is 55dB.

?

With LTspice 17.1.14, simulating with .ac dec 100 10 10000 yields the following errors, although it also obviously produces the above results:

?

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vdd}},{{vss}})}"

??? Error: undefined symbol in: "if([v](a)>((vthresh)),((vdd)),((vss)))"

u2:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u2:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u12:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

u1:_u1_u11:dd1: Emission coefficient, N=2.6437e-312, too small, limited to 0.1

Direct Newton iteration for .op point succeeded.

?

?

?

?

From: [email protected] <[email protected]> On Behalf Of Tony Casey via groups.io
Sent: Sunday, April 6, 2025 9:22 AM
To: [email protected]
Subject: Re: [LTspice] Simulation runs very slowly: test.asc

?

On 04/04/2025 23:51, Christopher Paul via groups.io wrote:

There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states:

?

* Model Usage Notes:

*

* A. Features have been modelled

*????????? 1. Startup Response

*????????? 2. Peak Current Limit

*????????? 3. Dropout Voltage vs Output Current?

*????????? 4. Line & Load Transinet (sic) Response

*

* B. Features haven't been modelled

*????????? 1. Quiescent Current vs Input Voltage

*????????? 2. Temperature dependent characteristics

*????????? 3. PSRR Response

?

If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.

The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.

What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.

The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.

Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.

I didn't test the other characteristics.

--
Regards,
Tony


Re: Simulation runs very slowly: test.asc

 

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On 06/04/2025 15:22, Tony Casey wrote:
The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.
Correction: the TI LM317 datasheet Figure 8 shows about 65dB at 25?C, not 57dB, which is over all temperatures. But Figure 8 is not reliable, because it shows the additional 10uF capacitor on ADJ makes the PSRR worse, not better. Perhaps the labelling of traces is switched? Not good, TI.

--
Regards,
Tony


Re: Simulation runs very slowly: test.asc

 

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On 06/04/2025 15:18, Rene via groups.io wrote:
why i have a feeling that i just crashed on idiots planet
Other planets are available.

--
Regards,
Tony


Re: Simulation runs very slowly: test.asc

 

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On 04/04/2025 23:51, Christopher Paul via groups.io wrote:

There are at least two unencrypted models I saw today: LM317_TRANS (No note on PSRR) and a more extensive model LM317A_TRANS, which states:

?

* Model Usage Notes:

*

* A. Features have been modelled

*????????? 1. Startup Response

*????????? 2. Peak Current Limit

*????????? 3. Dropout Voltage vs Output Current?

*????????? 4. Line & Load Transinet (sic) Response

*

* B. Features haven't been modelled

*????????? 1. Quiescent Current vs Input Voltage

*????????? 2. Temperature dependent characteristics

*????????? 3. PSRR Response

?

If the more extensive model says no to PSRR, I don’t hold out hope for the less extensive one.

The notes in the LM317A model are nonsense. PSRR is modelled, although it doesn't quite stack up with the datasheet, which states 68dB (typ) - the model delivers -55dB. For comparison, for the LM317, the datasheet figure is 57dB and the model delivered 62dB. The model behaviour overall is better than for the LM317, which doesn't model the output capacitor effect on PSRR. In the LM317A, it is modelled. The LM317A PSRR figure for when a 10uF capacitor is hung on the ADJ pin can't be achieved.

What doesn't seem to be modelled is the effect of the load current on PSRR. Maybe this is what the notes were supposed to cover.

The two transistor level models don't model current limiting correctly - it kicks in at ~800mA with some foldback, whereas the two TI behavioural models limit at ~2.2A, but with no foldback. None of them will have limiting modelled fully, because it is determined by Tj in the actual device. The LM317A behavioural model doesn't implement temperature-dependent limiting at all, whereas the LM317 version does, but the analysis explodes at 75?C.

Conclusion: all the models are flawed, but the TI LM317A model is the most reliable. I modified it so the inherent PSRR was 68dB, as per the TI datasheet Figure 10, and it showed the additional 10uF capacitor on the ADJ pin lowers this to 85dB, although Figure 10 suggests it should be closer to 82dB. These are close enough.

I didn't test the other characteristics.

--
Regards,
Tony


Re: Simulation runs very slowly: test.asc

 

why i have a feeling that i just crashed on idiots planet


Re: Simulation runs very slowly: test.asc

 

Ah, of course.? "Datasheet" makes sense.
?
Andy
?


Re: Simulation runs very slowly: test.asc

 

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On 06/04/2025 11:09, Andy I via groups.io wrote:
What is "the d/s compatibility"?
?
"d/s" suggests "Drain/Source".? But this is a bipolar device, so it lacks a Drain and Source, so what does it mean?? Sorry, I do not understand your cryptic abbreviations.
I took?"d/s" to Datasheet. But I could be wrong.

--
Regards,
Tony



Re: Simulation runs very slowly: test.asc

 

On Sun, Apr 6, 2025 at 05:00 AM, Rene wrote:b
??? the d/s compatibility // i haven't tested
What is "the d/s compatibility"?
?
"d/s" suggests "Drain/Source".? But this is a bipolar device, so it lacks a Drain and Source, so what does it mean?? Sorry, I do not understand your cryptic abbreviations.
?
Andy
?
?