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Date

Re: Interpreting Noise Simulation Results

 

I didn't consider the impact of the high impedance of the capacitor increasing the current noise at the input - thank you!


Looking for advice on TRAN timing #FFT

 

I'm looking for help concerning the timing parameters of a TRAN simulation
to evaluate the distortion of an amplified sine wave.
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I've been reading through lots of messages of this group concerning "distortion" and "tran timing"
recently but could not find an answer to what I was looking for.
[I came across the audio distortion analyser contributed by Tony Casey,
for which I am thankful and it is indeed a fine tool.]
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Hitherto I've used 1 or 2 per mille of the sine wave period, so the time step would be 1 usec or 2 usec
when testing with 1 kHz. From my tests I decided for myself that values exceeding 1% of the period
should best be avoided.
I also tested time steps adjusted to the power of 2, e.g. 2**14 (interval / 16384).?
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For the interval (t_stop - t_start) I usually take 16msec when testing with 1kHz
but I have also used values from 10msec to 48msec.
It is this parameter which I personally find most difficult to decide upon.
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So, to sum it all up, I wonder if there is a guideline which values to use for the time step
and the interval for a certain test frequency when testing audio related circuits with sine waves.
(I'm still using LTspice XVII.)
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Ryu


Re: 12AU7 tube heater model

 

On Fri, Feb 21, 2025 at 03:50 AM, Carlo wrote:
.... However Spice Error log reports the following:
ERROR: Node U1:HB is floating and connected to current source G:U1:HOT
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Direct Newton iteration for .op point succeeded.
What is the problem behind it ? Thanks.
This is a "false" error, coming from processing the topology of the model.? I think you can safely ignore it.
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This model uses a G-source to emulate a variable resistance.? That is a popular technique among SPICE model-makers.? The problem is that a G-source is a controlled current source.? However, note that the G-source:
Ghot ?HB H2 VALUE {(1/(V(HG)+0.001))/({RHO}-{RCO})*V(HB,H2)}
includes the voltage between its own output terminals, V(HB,H2), in its formula, thereby turning it into a resistor, not an ideal current source.? But LTspice doesn't know this.? It sees the circuit topology as a current source connected to another current source, and it thinks the node where they join is "floating".? So it generates the error message, but it continues to process the netlist anyway, and everything works!
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It works OK because Ghot emulates a resistor, and that node is not really floating.? But that is a difficult thing to figure out, and there is no suggestion of that from the topology alone.? The error message comes from the topology check.
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My advice?? Ignore that error message.? We see it a lot in models that use G-sources to emulate controllable resistors.? I think it's the most "compatible" way of making a variable resistor.? But the "error" is harmless because it's not real.
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Andy
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Re: LTspice Save Internal Device Voltages

 

On Fri, Feb 21, 2025 at 04:12 AM, Andy I wrote:
It might be that the internal node in the Thevenin equivalent of a lossless inductor is not one of them either.
Thinking again about it, since Thevenin equivalent introduces actually the inductor current as new system's unknown, maybe it doesn't count as new "internal node voltage" though.
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Carlo.


Re: LTspice Save Internal Device Voltages

 

I never knew exactly what those "internal device" nodes were, and I think it was never explained, in the years I have been following this group.
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I suspect those internal nodes might be internal to certain transistor models.? For example, if you look at the VBIC model, the circuit is quite complex and has a handful of what appear to be internal nodes.? I tried once to see if those were the "internal device" nodes that this setting refers to, but was unable to see them.? It might be that the internal node in the Thevenin equivalent of a lossless inductor is not one of them either.
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Andy
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LTspice Save Internal Device Voltages

 

On LTspice Control Panel->Save Default tab there is a checkbox named "Save Internal Device Voltages".
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I believe it is supposed to save the voltages of "device internal nodes". Take for instance an inductor with a default Rser=1m. For a such device, LTspice employs a proprietary "compound model" based on Norton equivalent in order to reduce the overall circuit's solving matrix size.
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As explained in Help page, setting Rser=0 forces LTspice to use the "cumbersome" Thevenin equivalent introducing an internal node in the inductor's model. That means the current through the inductor becomes a new unknown of the circuit's solving system (you can check this in SPICE Error log: the matrix size actually increments by 1).
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That said, I thought the checkbox above added some information about this "device internal node". However, it seems it is not actually the case.
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Any idea about it ? Thanks.
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Carlo.
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Re: 12AU7 tube heater model

 

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Sorry, I misinterpreted that last line in the netlist. A G source is a voltage-dependent current source, so it defines a transconductance, not a simple conductance. I think that the syntax in the Help is much too terse: the parameter N is, for example, not defined, and it seems that it is not essential to use the old POLY command.

On 2025-02-21 10:27, Carlo wrote:
On Fri, Feb 21, 2025 at 01:59 AM, John Woodgate wrote:
I suspect that the 'error message' is nothing to worry about. the current source has infinite impedance, so the U1:HB node appears not to be connected.
Sorry, what kind of controlled source is actually the G source named "hot" within the SUBCKT heater model ?
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From LTspice help:
Syntax: Gxxx n+ n- value={<expression>}This is an alternative syntax of the behavioral source, arbitrary behavioral voltage source, B.
Does it mean that Ghot is just a behavioral voltage source, or that it is a current source controlled from a voltage (i.e. voltage-controlled current source) ?
?
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


Re: Interpreting Noise Simulation Results

 

¿ªÔÆÌåÓý

Further to what I wrote below, I have uploaded a modified version of your schematic that uses a single amplifier circuit but switches the filter networks into or of out of circuit. This enables the noise with and without the HPFs to be displayed on the same graph, by stepping the Ctl parameter.

You should also know that the FMMT718 model you have added is unreasonably optimistic, as it exhibits no 1/f noise. In any event it is swamped by the increased noise from the HPFs, when these are in circuit.

You could drastically decrease the noise contribution of the HPFs by scaling the impedance down, while keeping the cut-off frequency the same. I've shown the effect of changing Rfilt from 100¦¸ to 10k¦¸.

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Regards,
Tony


On 20/02/2025 23:19, Tony Casey wrote:

Yes, an RC high pass filter on the input will increase the noise. Although the capacitor doesn't itself add any noise, it causes the effective input noise voltage to increase, because:

Vn(tot) = ¡Ì(En^2 + (In/2/pi/Cser)^2)

..where: En = I/P noise voltage density, and In = I/P noise current density (neglecting the source resistance noise, which often you can't do)

Remember also: "No attenuation before gain".

I should also mention (without seeing your schematic), that many of the devices in the LTspice standard libraries don't have realistic noise parameters, especially when it comes to 1/f noise.

--
Regards,
Tony


On 20/02/2025 20:17, manauo via groups.io wrote:
I don't have much experience using LTSPICE for noise simulations, and I'm having trouble understanding some of the results I'm getting. I'm investigating an amplifier circuit (file "Amplifier Noise" uploaded to files/Temp).
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The amplifier is a cascode differential pair, signal frequency is 1MHz. Currently the circuit has no filtering besides the inherent roll-off at high frequency. I'm investigating whether adding AC coupling capacitors to the input to filter low-frequency noise can improve the performance. The inductance/resistance in series with each input represents the output impedance of the previous stage.
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When I simulate the original circuit with no coupling capacitors, the result seems reasonable - relatively flat, input noise is a fraction of the output noise. However when I simulate the proposed circuit with coupling capacitors I don't understand the result.
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The input noise balloons at low frequencies - the frequency range that the HPF of the capacitor is supposed to reduce, is now much greater. The output noise is lower in terms of total integrated noise, but still has an increased magnitude at low frequency compared to the original.
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The decrease in total output noise is coming from a decrease in the high frequency noise, which makes sense because the inductance of the source impedance and the base pull-down resistor form an RL LPF. But the capacitor does not seem to be reducing LF noise, even though an AC sweep shows the expected HPF behavior.
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Am I misinterpreting the results somehow? How is adding a high-pass filter at the input increasing noise at the low frequencies that it is supposed to be attenuating? What am I missing about noise simulations?


Re: 12AU7 tube heater model

 

On Fri, Feb 21, 2025 at 01:59 AM, John Woodgate wrote:
I suspect that the 'error message' is nothing to worry about. the current source has infinite impedance, so the U1:HB node appears not to be connected.
Sorry, what kind of controlled source is actually the G source named "hot" within the SUBCKT heater model ?
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From LTspice help:
Syntax: Gxxx n+ n- value={<expression>}This is an alternative syntax of the behavioral source, arbitrary behavioral voltage source, B.
Does it mean that Ghot is just a behavioral voltage source, or that it is a current source controlled from a voltage (i.e. voltage-controlled current source) ?
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Re: 3 Phase Voltage Sense model

 

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For curiosity
What device are you driving with Vout(ABC) ?
My home is "3Phased"? :)


Le 20/02/2025 ¨¤ 18:58, larry.gunseor@... a ¨¦crit?:

Already did that and the outputs still are not correct
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Re: 12AU7 tube heater model

 

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I suspect that the 'error message' is nothing to worry about. the current source has infinite impedance, so the U1:HB node appears not to be connected. RHO=42 means that the heater is set for 12.6V/0.15A operation, whereas the amp circuit may be using either 6.3V/0.3A or 6.3V/0.3A. The bad behaviour of the amp circuit must be due to the last line of the heater netlist, since that function returns an infinite value at start-up, where V(HB,H2) = 0. I don't see what that conductance represents anyway, nor why it's defined as a conductance rather than a resistance. The whole thing looks very complicated for representing a simple hot wire.

On 2025-02-21 08:50, Carlo wrote:
Starting from the 12AU7 SUBCKT from , I created a SUBCKT model for the 12AU7 heater, namely:
*** 12AU7 Heater subckt model ***
.SUBCKT 12AU7H H1 H2
+PARAMS: RCO=6.2 RHO=42 HTV=6.3 HWU=10.5
Rcool H1 HA {RCO}
Rload HA HB 1M
Esens HD 0 ?VALUE {V(HA,HB)*1000}
Epwr ?HE 0 ?VALUE {V(H1,H2)*V(HD)/(PWR({HTV},2)/{RHO})}
RH1 ? HE HF 91k
CH1 ? HF 0 ?{HWU/1E6}
EH2 ? HG 0 ?VALUE {V(HF)}
RH2 ? HG HH 270k
CH2 ? HH 0 ?{HWU/1E6}
EH3 ? HJ 0 ?VALUE {LIMIT(V(HH)-0.75,0,1E6)*4}
RH3 ? HJ HK 91k
CH3 ? HK 0 ?{HWU/1E6}
Ghot ?HB H2 VALUE {(1/(V(HG)+0.001))/({RHO}-{RCO})*V(HB,H2)}
.ENDS
I used it in a simple schematic doing a DC Sweep analysis on a DC current source connected to heater's pins H1 and H2 (one of the current source's pin is connected to GND). However Spice Error log reports the following:
ERROR: Node U1:HB is floating and connected to current source G:U1:HOT
?
Direct Newton iteration for .op point succeeded.
What is the problem behind it ? Thanks.
?
Carlo.
--
OOO - Own Opinions only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

Virus-free.


Re: 3 Phase Voltage Sense model

 

¿ªÔÆÌåÓý

Symbol pin order is good with "3Phase_Voltage_Sense.asy"

Delete "3Phase_Voltage_Sense.asy"
Load "3Phase_Voltage_Sense_model.asc"
Generate "3Phase_Voltage_Sense_model.asy" by clicking "Hierarchy/Open or generate ..? "
Load "3Phase_Voltage_Sense_Test.asc"
Place "3Phase_Voltage_Sense_model.asy"
And yes, pin order has changed, correct cabling

And it works

Ground to Neutral is necessary
"3Phase_Vsense.sub" is unuseful

Greetings




Le 21/02/2025 ¨¤ 06:53, Andy I via groups.io a ¨¦crit?:

Larry,
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Here is an actual mistake, and the likely cause of the problem you have.? The pin-order of the symbol does not match the pin-order of the included netlist model.
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Symbol's pin-order:? Neutral VinA VinB VinC VoutA VoutB VoutC
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Subcircuit's pin-order:? VinA VinB VinC Neutral VoutA VoutB VoutC
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That needs to be corrected.? Edit either the symbol (.asy) file or the model (.sub) file.
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Andy
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12AU7 tube heater model

 

Starting from the 12AU7 SUBCKT from , I created a SUBCKT model for the 12AU7 heater, namely:
*** 12AU7 Heater subckt model ***
.SUBCKT 12AU7H H1 H2
+PARAMS: RCO=6.2 RHO=42 HTV=6.3 HWU=10.5
Rcool H1 HA {RCO}
Rload HA HB 1M
Esens HD 0 ?VALUE {V(HA,HB)*1000}
Epwr ?HE 0 ?VALUE {V(H1,H2)*V(HD)/(PWR({HTV},2)/{RHO})}
RH1 ? HE HF 91k
CH1 ? HF 0 ?{HWU/1E6}
EH2 ? HG 0 ?VALUE {V(HF)}
RH2 ? HG HH 270k
CH2 ? HH 0 ?{HWU/1E6}
EH3 ? HJ 0 ?VALUE {LIMIT(V(HH)-0.75,0,1E6)*4}
RH3 ? HJ HK 91k
CH3 ? HK 0 ?{HWU/1E6}
Ghot ?HB H2 VALUE {(1/(V(HG)+0.001))/({RHO}-{RCO})*V(HB,H2)}
.ENDS
I used it in a simple schematic doing a DC Sweep analysis on a DC current source connected to heater's pins H1 and H2 (one of the current source's pin is connected to GND). However Spice Error log reports the following:
ERROR: Node U1:HB is floating and connected to current source G:U1:HOT
?
Direct Newton iteration for .op point succeeded.
What is the problem behind it ? Thanks.
?
Carlo.


Re: PWM Timing Causing Shoot-thru

 

May,
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I don't know if we will see your updated file with the missing LTspice symbol, or if you consider the problem to be solved already.
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But I want to mention that your signals HCF and LCF did not look right.? In contrast with the other two pairs which have no overlap, the HCF and LCF pair have tons of overlap.? I think maybe you forgot to invert one of them.? Maybe that is correct, but it looks funny when compared with the other two pairs.
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Andy
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Re: 3 Phase Voltage Sense model

 

Larry,
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Here is an actual mistake, and the likely cause of the problem you have.? The pin-order of the symbol does not match the pin-order of the included netlist model.
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Symbol's pin-order:? Neutral VinA VinB VinC VoutA VoutB VoutC
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Subcircuit's pin-order:? VinA VinB VinC Neutral VoutA VoutB VoutC
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That needs to be corrected.? Edit either the symbol (.asy) file or the model (.sub) file.
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Andy
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?


Re: 3 Phase Voltage Sense model

 

Larry,
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Here are some issues to comment on:
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(1)? Your original schematic (3Phase_Voltage_Sense_circuit.asc) leaves the Neutral net floating.? Why?? Did you really want it to float like that?? Also, do you want it grounded in the final schematic?? If nothing else, it is different.
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(2)? The symbol you created (3Phase_Voltage_Sense.asy) is set up with incorrect properties.? It should have Symbol Type = Cell, but you left it with Symbol Type = Block, which is correct only for calling a lower-level schematic, not a netlist file.? Fortunately LTspice seems to handle it anyway in spite of the wrong property.
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(3)? Your final schematic (3Phase_Voltage_Sense_Test.asc) should not have ".inc 3Phase_Vsense.sub" because the symbol file already includes that netlist file.? It does not actually hurt because the end result is that the subcircuit file is included twice.? But it's not a good idea to do that because it might later create problems.
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I think none of these issues causes the problem you have, but I want to mention them anyway.
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Andy
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Locked Re: Windows XP installation disk

 

Off-topic.? And it suggests it is not legal.
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This topic is closed.? No replies, please.
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This group is about LTspice.


Locked Windows XP installation disk

 

Does anyone have a Windows XP install disk they could give or sell me? ?Or a copy with the password decrypted.

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I need a pukka XP machine to run the software I wrote myself in da last Millenium. ?Yes. ?I've tried the various Virtual machines but none of them give me the functionality I need. ?To put this into perspective, I run a DOS window under Win 98 on the XP machine.

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Machines that have XP drivers are all more than 10 yrs old. ?I found one but I lent my pukka XP install disc to a friend who promptly lost it???


Re: Weird results DC operating point for Tube amplifier

 

¿ªÔÆÌåÓý

You're correct.

Le 20/02/2025 ¨¤ 23:20, Andy I via groups.io a ¨¦crit?:

On Thu, Feb 20, 2025 at 12:17 PM, Jerry Lee Marcel wrote:

BTW, source-follower it is not. It's actually a common-source stage.
A source fiollower has about unity gain, this common-source has about 15dB gain.

No, it is a source follower.? Its voltage gain is unity.? Input applied to gate, output from source pin.? Almost the same output voltage, but shifted 4.2 V lower.
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The overall circuit has voltage gain (~23 dB), but all of that comes from the 12AU7, in its common-cathode configuration.
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I wonder why you saw only 15 dB gain, and why you saw that in just the MOSFET.
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Not that the following has any significance - but I vaguely recall reading about operating valves (vacuum tubes) at much lower than "normal" anode voltages.? ?There were specialized miniature valves designed for it.? But it was also applied to more traditional valves too, ones like the 12AU7 that are capable of hundreds of volts.? It does not appear to be a sure-fire way to generate distortion, as this simulation demonstrates, if you trust the SPICE models.? I can't recall what were the advantages (if any) of using such low voltages - other than easier battery power.? Lower noise?? ?Longer life?? I dunno.
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Andy
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CD4000_v(65).lib with syntax error messages updated to CD4000_v(65a).lib

 

hi
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I've corrected and uploaded CD4000_v(65a).lib
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The only corrections made were to the td1,td2,td4 equations used in CD4008B sub circuit.
The unbalanced braces/parenths caused syntax error messages in LTspice 24.1.4
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eetech00