abid asked, "what's the difference between?hierarchical sub-schematic and subcircuit? Are they the same?"

Yes and no.? Mostly no.

A schematic is a diagram that you can draw.

A subcircuit is a block of SPICE netlist lines.

A hierarchical sub-schematic ends up creating a subcircuit, when the whole schematic is turned into a SPICE netlist.? Until that moment, it is not a subcircuit yet.? After being turned into a subcircuit, LTspice then expands the netlist and effectively eliminates all the subcircuits, so it is a temporary state of the netlists.

"In the schematic that Tony uploaded, is it necessary to write the following lines? Won't just using the symbol work?"

Yes to the first, and no to the second.? A symbol is JUST AN ICON, or a PLACE-HOLDER.? It has no function of its own.? The subcircuit text is necessary because it has the circuit that the symbol represents.? The symbol means, "I want that subcircuit to be used here."? But the subcircuit needs to be defined, by having it there on the schematic.? All of the lines, from .SUBCKT to .ENDS, must be somewhere, either on the schematic itself, or in a separate file.? It is not in the symbol.

Andy

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On 23/05/2024 20:47, abid wrote:

Thanks. I had some questions. How do I create the SRD subcircuit?

*
.subckt SMMD805 1 2
Lser 1 11 1n
Cpar 11 2 2p
D1 11 2 D_805
*

What does Lser, Cpar, D1 mean? Also what does the numbers beside these parameters mean?

.MODEL D_805

Should it be .MODEL SMMD805?

?

How do you create the SRD symbol? And then use it in a pulse generator? I would really appreciate if you could explain these things a bit.

Thanks all for all the help. I guess my question is how do I create an SRD from scratch and how do I make it a subcircuit for bigger circuits.

?

Also, in both the IEEE paper and the researchgate paper attached earlier, there is a charge equation. Can I incorporate that equation while creating SRD??

Lser and Cpar are the the internal bond wire and package capacitance, respectively. They are actually present in all packaged semiconductor devices but cannot be incorporated into .MODELs and are usually not considered. Since they become more important at high frequencies, they are usually added for high frequency devices. The naming of this .MODEL is purely arbitrary, since it not exposed to the outside world. I suspect it is abbreviated to D_805 because this die is incorporated into other physical diodes in different packages, which are embedded in different .SUBCKTs with different Lser and Cpar values to suit the different packages.

The charge equation is largely satisfied by appropriate choice of parameters in the diode .MODEL - in particular CJ0, VJ, M, TT - which is embedded in the .SUBCKT.? (BTW, LTspice is not case-sensitive, I use CAPS purely for emphasis.)

You will find answers to your other questions when you have used LTspice for longer. You cannot become an expert in a day, or even a month.

--
Regards,
Tony

what's the difference between?hierarchical sub-schematic and subcircuit? Are they the same?

?

In the schematic that Tony uploaded, is it necessary to write the following lines? Won't just using the symbol work?

.subckt SMMD805 1 2
Lser 1 11 1n
Cpar 11 2 2p
D1 11 2 D_805
*
.MODEL D_805 D(IS=500.0E-15 N=1.3 RS=0.13
+ CJ0=4.55E-12 VJ=0.5 M=0.235 XTI=3.0
+ EG=1.12 BV=60 IBV=10E-6 TT=30E-9)
.ends SMMD805
*

Also, if Tony is seeing this, could you please upload the schematic from which you created the SRD symbol? Thanks.

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It's most likely a typo. "C" and "D" are adjacent on a UK keyboard. Having not noticed initially, it proliferated and I have loads of files prefixed with "SRC" in that work folder. ?

--

abid,

In many SPICE programs (which might include LTspice), the built-in diode model's diode capacitance follows these formulas:

C = Cj*area + Ct

Cj = Cjo*(1-Vd/Vj)^-M for Vd ≤ Fc*Vj
? ? = Cjo*((1-Fc)^(-M-I))*(1-Fc*(1+M)+M*Vd/Vj) for Vd > Fc*Vj

Ct = TT*area*(d(Inrm*Kinj+Irec*Kgen)/dVd)

But some of the parameters above also are functions of temperature.? It gets complicated.

Andy

abid,

The circuit that is shown in 4.png represents a circuit of a diode and the package parasitics, and maybe a bit more.

The basic diode (and transistor) models in SPICE are good for on-chip semiconductors but incomplete for separately packaged components which typically have lead inductance and capacitance of the attachments.? When someone needs the added detail of package parasitics, they can add them separately.? In 4.png, that includes Cp, Ls, and probably Rs.? Capacitor Cj might be part of that too, but Cj(V) depends on voltage so it is more than just that.? The built-in diode model in SPICE already has a junction capacitance Cj(V) that depends on voltage, so adding another one is normally not needed.? On the other hand, if the SPICE diode's Cj(V) can not be adjusted to fit the actual diode's Cj(V) with enough accuracy, then they might add the separate capacitor shown in 4.png.

It is difficult to answer your questions about Cj(V).? As I say, SPICE's built-in diode model already has a Cj(V) that depends on voltage in the way that most diodes do.? But sometimes people want to "take control" and do it their own way, instead of using the built-in SPICE models.? I do not know if step-recovery diodes have different capacitance Cj(V) than "other" diodes.? Since SRDs are used in extremely high frequency circuits, it's probably important to get that characteristic just right.

This probably does not entirely answer your question, especially how it relates to equation 2 in one of the papers.

Andy

Thanks Andy for the clarification. I think I have started to get things. I am confused about the circuit model of the SRD. Different papers have used different circuits. I have uploaded a circuit model here (4.png) /g/LTspice/album?id=295221. For this one, do I need to model the Cj(V) too in the subcircuit? In that case, can I use the equation (2.png) to model the Cj(V)? What I am trying to know is what is the LTspice equivalent of figure 1(a) of the picture (1.png)

?

If Tony or someone could upload the schematic from which the subcircuit's (SRD) symbol is created, that would be great for me to understand. Thanks.

abid wrote, "What does Lser, Cpar, D1 mean?"

Those are SPICE Netlist elements.? Any element beginning with an 'L' is an inductor.? 'C' is for capacitor.? 'D' is for diode.? The names Lser, Cpar, and D1 were arbitrarily chosen.

There are many, many references about SPICE where the simple stuff like that is described.? LTspice's Help talks about it too.

"Should it be .MODEL SMMD805?"

No, it should be '.MODEL D_805 D ....? That line (actually it's 3 lines with the continuation characters) defines a diode named "D_805", which is the one used in the Netlist line "D1 11 2 D_805".? That element is PART OF the subcircuit named "SMMD805".? The subcircuit includes a series inductance (Lser) and a parallel capacitance (Cpar).? The basic intrinsic SPICE diode has no package parasitics such as inductance, so a common thing to do is to enclose an intrinsic diode inside a subcircuit with those extra elements.? That is what the figures show, in the papers you referred to.

"How do you create the SRD symbol? And then use it in a pulse generator?"

He drew it.? LTspice has a symbol editor too.

It is used in the pulse generator by having that symbol as part of the pulse generator's schematic.

Symbols don't actually "do" anything.? The symbol for a resistor is a rectangle or a squiggly line, but the symbol is not the model, and does not affect the V/I relationship.? The symbol is just an icon.

None of these questions really help with the problem of creating a SRD model from scratch.? The electrical details of the SRD are a (potentially) complicated subject, which I have not even attempted to describe here.? If you plan to simulate things in LTspice, you should take the time to learn LTspice, and then learn how to model an SRD.? They are two completely separate things.

Andy

On Thu, May 23, 2024 at 03:18 AM, Tony Casey wrote:

I have uploaded one of my old schematics that uses the SRD in shunt mode, which is often more useful than the series mode.

Thanks. I had some questions. How do I create the SRD subcircuit?

*
.subckt SMMD805 1 2
Lser 1 11 1n
Cpar 11 2 2p
D1 11 2 D_805
*

What does Lser, Cpar, D1 mean? Also what does the numbers beside these parameters mean?

.MODEL D_805

Should it be .MODEL SMMD805?

?

How do you create the SRD symbol? And then use it in a pulse generator? I would really appreciate if you could explain these things a bit.

Thanks all for all the help. I guess my question is how do I create an SRD from scratch and how do I make it a subcircuit for bigger circuits.

?

Also, in both the IEEE paper and the researchgate paper attached earlier, there is a charge equation. Can I incorporate that equation while creating SRD??

?

Tony wrote, "... I have uploaded?one of my old schematics ..."

Tony, I am wondering, what does the "SRC" stand for, in the filenames?

Thanks,
Andy

John Woodgate wrote, referring to the SDD model:

Could it be 'translated', if it's not too big?


If one had a copy of the SDD model in question, I am sure it could be translated to Spice syntax with some unknown amount of effort, however be aware a lot of ADS SDD models are written in Verilog and Ptolemy. Others are in a more obvious syntax closer to spice. The SDD is a container for various supported syntax’s.

Ray

The Master of Science Thesis uploaded here (/g/LTspice/files/Temp/Electrical%20Pulsing%20of%20a%20Laser%20Diode%20for%20Usage%20in%20Fluorescence%20Microscopy.pdf) contains the simulation with LTspice of a step recovery diode circuit.

I have found out following detail regarding setting local and global temperatures, read LTspice code below.
Main point is, that you cannot pass the temperature variable in a function to the subcircuit and as a value expression.
Has anyone made a similiar experience or explanation for this detail?

Here, the relevant code, simply copy into a simulation file.
<<
; Case 1: Direct usage of TEMP variable as parameter (e.g., voltage): => overwriting works.
.subckt SUB1 A B
V1 A B {TEMP}
.backanno
.ends

; Case 2: TEMP variable in function and usage of the function in a component parameter (e.g., voltage): => overwriting works.
.subckt SUB2 A B
.func f(x) {TEMP}
V1 A B {f(1)}
.backanno
.ends

; Case 3: Usage of TEMP variable in VALUE expression of controlled source: => overwriting works.
.subckt SUB3 A B
E1 A B VALUE={TEMP}
.backanno
.ends

; Case 4: TEMP variable in function and usage of the function in VALUE expression of a controlled source: => overwriting DOES NOT work.
.subckt SUB4 A B
.func f(x) {TEMP}
E1 A B VALUE={f(1)}
.backanno
.ends

.op

X1A S0 0 SUB1
X1B S1 0 SUB1 TEMP=50 ; ==> works
X2 S2 0 SUB2 TEMP=50 ? ; ==> works
X3 S3 0 SUB3 TEMP=50 ? ; ==> works
X4 S4 0 SUB4 TEMP=50 ? ; ==> DOES NOT work
>>

I have just uploaded the SPICE model of the MA44769-287T Step Recovery Diode as found in MACOM's website.

It is here: /g/LTspice/files/Temp/MA44769-287T_SPICE_MODEL.zip

?

Tony's schematics have the opposite problem of Helmut's from 2006.? Whereas the fonts in Helmut's are tiny, Tony makes his schematics with text that overlaps other text, making many of his schematics difficult to read.? That's because Tony set his LTspice to a different system font size, which allows him to place his text too close together without realizing it.

Go into the Control Panel (Tools > Settings > Drafting Options) and change the Font Properties > Size to something smaller.

I think the default size is 28, so that is what the majority of LTspice users have.? Whatever you change it to, remember that the number is saved and becomes your new default font size.

Andy

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On 23/05/2024 13:12, Andy I wrote:

Tony, you forgot to include your symbol file "diode-steprecovery.asy".

Oops. Yeah, I do that too. ? Fixed.

--
Regards,
Tony

Tony, you forgot to include your symbol file "diode-steprecovery.asy".

Andy

abid wrote, "Is the whole circuit SRD? It's a bit confusing," referring to step_recovery_diode.asc from 2006.

No, I don't think so.? Only about half of it is.

Also, the text is rather small, but you can fix that by starting LTspice with the "-FixUpSchematicFonts" command-line switch.? This schematic pre-dates a change in LTspice's handling of font sizes, which makes them look so small today.? Use "-FixUpSchematicFonts" to update the font sizes.

On that schematic, look for the comment text "Diode with parasitics".? The components below that text are:

• Cse
• Cp
• Lp
• D1
• Cpad1
• Cpad2

Those six components represent the SRD.? Well, technically the first four are the SRD, and Cpad1 and Cpad2 are probably the PCB pads to which the SRD connects.

All the other stuff to the left of Cpad1 and to the right of Cpad2 are external devices to which the SRD is connected.? It looks like Tshunt is a shorted quarter-wave trap filter, and T1 and T2 just represent traces on the PCB.? Rs is the source impedance and RL is the load.

Helmut provided several URLs as comments on the schematic.? It might be worth following those, to see where he got this schematic.? Since it is nearly two decades old, you might need to use the "Wayback Machine" () to retrieve some of them if they are not on the 'net anymore (but hopefully they are).

However - Tony is more of an expert on this, so I recommend following his recommendations.

Andy

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On 23/05/2024 10:37, abid wrote:

On Wed, May 22, 2024 at 08:39 PM, Andy I wrote:

I'm sorry, I forgot to include the link to the 2006 schematic file uploaded by Helmut Sennewald, with his step recovery diode.? It is here:

Files > z_yahoo > Examples > Educational > step_recovery_diode.asc
/g/LTspice/files/z_yahoo/Examples/Educational/step_recovery_diode.asc

His schematic notes say you must use the "Alternate Solver", but it seems to work with the "Normal Solver" too.

Is the whole circuit SRD? It's a bit confusing.?

It's just the diode itself that's the SRD. I have uploaded one of my old schematics that uses the SRD in shunt mode, which is often more useful than the series mode. It also doesn't use an LC matching circuit, which makes a wideband design possible. Normally, SRD comb generators and multipliers tend to be quite narrowband (I/P PRF).

--
Regards,
Tony

On Wed, May 22, 2024 at 08:39 PM, Andy I wrote:

I'm sorry, I forgot to include the link to the 2006 schematic file uploaded by Helmut Sennewald, with his step recovery diode.? It is here:

Files > z_yahoo > Examples > Educational > step_recovery_diode.asc
/g/LTspice/files/z_yahoo/Examples/Educational/step_recovery_diode.asc

His schematic notes say you must use the "Alternate Solver", but it seems to work with the "Normal Solver" too.

Is the whole circuit SRD? It's a bit confusing.?