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Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

Don't forget that the iron core will have losses at the switching frequency, along with the inductance of the windings which will have a significant impedance to the high frequency switching. These will all have an affect on the output waveform, forcing it to be more sinusoidal.


On Wed, 5 Jul 2023 at 11:36, Kerim via <ahumanbeing2000=[email protected]> wrote:
On Wed, Jul 5, 2023 at 01:04 PM, Jerry Lee Marcel wrote:
That's because the leakage inductance is rather high.
So, in your opinion, what could be the other element in the transformer to complete its LPF response since there is no load at its HV output?


Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

On Wed, Jul 5, 2023 at 01:04 PM, Jerry Lee Marcel wrote:
That's because the leakage inductance is rather high.
So, in your opinion, what could be the other element in the transformer to complete its LPF response since there is no load at its HV output?


Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

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That's because the leakage inductance is rather high.

Le 05/07/2023 à 11:33, Kerim via groups.io a écrit?:

On Wed, Jul 5, 2023 at 11:48 AM, John Woodgate wrote:
The 'other element' is mostly the load resistance reflected into the primary circuit.

Your answer is logical.
But I was surprised when I tested a ready-made inverter, its HV output (of a conventional iron core transformer) was sinewave even without a capacitor as a load!


Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

On Wed, Jul 5, 2023 at 11:48 AM, John Woodgate wrote:
The 'other element' is mostly the load resistance reflected into the primary circuit.

Your answer is logical.
But I was surprised when I tested a ready-made inverter, its HV output (of a conventional iron core transformer) was sinewave even without a capacitor as a load!


Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

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Le 05/07/2023 à 10:58, Donald H Locker via groups.io a écrit?:

Sounds like a ferroresonant power conditioner. Does that ring a bell? I don't think they are very efficient, but they are quite effective at producing sine waves from all kinds of nasty inputs.

OP specified "pure sinewave inverters which use conventional two-winding iron core transformers."


Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

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Sounds like a ferroresonant power conditioner. Does that ring a bell? I don't think they are very efficient, but they are quite effective at producing sine waves from all kinds of nasty inputs.

Donald.

On 2023-07-05 04:00, Kerim via groups.io wrote:

I guess many of you, if not all, heard of pure sinewave inverters which use conventional two-winding iron core transformers.

Their transformer is driven by a MOSFET bridge which, in turn, is driven by a sinewave PWM (for 60/50 Hz) whose frequency could be 16 KHz, for example.

This means that the transformer, with or without load, can also act as an effective low pass filter (perhaps with a very small ripple on its output voltage).

?

My first thought is that the transformer’s leakage inductances play the main element(s) in its function as LPF. But there must be another element to complete the LPF. Is it the stray capacitances, the core losses or both?

?

In vain, I have searched a linear model which could be used in simulating a transformer in such application.

I wonder if someone recalls that such a model could exist in the group’s archive so that I will redo my search looking for it.

?

Thank you.

Kerim


Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

The leakage inductance, in conjunction with the resistive part of the load, constitutes a 1st-order LPF. The stray capacitances are in most cases negligible in this respect.


Re: Linear Transformer Model Which Can Also Simulate its LPF Function

 

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The 'other element' is mostly the load resistance reflected into the primary circuit.

======================================================================================
Best wishes John Woodgate OOO-Own Opinions Only

Rayleigh, Essex UK

I hear, and I forget. I see, and I remember. I do, and I understand. Xunzi (340 - 245 BC)


On 2023-07-05 09:00, Kerim via groups.io wrote:

I guess many of you, if not all, heard of pure sinewave inverters which use conventional two-winding iron core transformers.

Their transformer is driven by a MOSFET bridge which, in turn, is driven by a sinewave PWM (for 60/50 Hz) whose frequency could be 16 KHz, for example.

This means that the transformer, with or without load, can also act as an effective low pass filter (perhaps with a very small ripple on its output voltage).

?

My first thought is that the transformer’s leakage inductances play the main element(s) in its function as LPF. But there must be another element to complete the LPF. Is it the stray capacitances, the core losses or both?

?

In vain, I have searched a linear model which could be used in simulating a transformer in such application.

I wonder if someone recalls that such a model could exist in the group’s archive so that I will redo my search looking for it.

?

Thank you.

Kerim


Linear Transformer Model Which Can Also Simulate its LPF Function

 

I guess many of you, if not all, heard of pure sinewave inverters which use conventional two-winding iron core transformers.

Their transformer is driven by a MOSFET bridge which, in turn, is driven by a sinewave PWM (for 60/50 Hz) whose frequency could be 16 KHz, for example.

This means that the transformer, with or without load, can also act as an effective low pass filter (perhaps with a very small ripple on its output voltage).

?

My first thought is that the transformer’s leakage inductances play the main element(s) in its function as LPF. But there must be another element to complete the LPF. Is it the stray capacitances, the core losses or both?

?

In vain, I have searched a linear model which could be used in simulating a transformer in such application.

I wonder if someone recalls that such a model could exist in the group’s archive so that I will redo my search looking for it.

?

Thank you.

Kerim


Re: No MAX31740 Spice Model

 

Hello !
Does this suit you ?
/g/LTspice/files/Temp/MAX31740.zip


Re: Diode V40DL45 Vishay

 

Hello, Thanks very much.


Re: Diode V40DL45 Vishay

 

Yes.
You can use it in a text file with an .inc directive.
OR
You can place it on the schematic as .model statement, then use v49DL45 in the Diode symbol "value" attribute.

However, remove "t_measured=27" from the .model? statement. It is not needed or recognized in LTspice.


Diode V40DL45 Vishay

 

Hello, I found a PSpice model at Vishay.
?
****
Copyright 2020 Vishay Intertechnology, Inc.
All rights reserved.
****
*produced by Vishay General Semiconductor Taiwan
*Allen Su, 2017/10/24
*   PSPICE
.MODEL v40dl45 D IS=6E-005 RS=0.003654 N=1.234
+ CJO=9929p M=1.662 VJ=14.52 TT=246p eg=0.67 xti=6.3 BV=49.5 IBV=222.79 t_measured=27


Can I use this as text (.inc) in the schematic, or does a component have to be created?
Thanks very much
?


Re: Scaling a lithium ion battery schematic

 

Ahh, yes; thanks very much.

T


Re: Scaling a lithium ion battery schematic

 
Edited

On 04/07/2023 14:47, Tim Hutcheson via groups.io wrote:
Tony, since limit(x,y,z) is? equivalent to min(max(x,y),z)
shouldn't your original limit expression
B3 vsoc1 0 I=limit(0,1,V(vsoc1))*I(V1)
have been written as
B3 vsoc1 0 I=limit(V(vsoc1),0,1)*I(V1)
although it doesn't seem to matter in this case.
I think you have me confused with eetech00. My B-source expression didn't have a limit() function, which changes the discharge characteristic from linear to logarithmic. In any event, the order of the arguments in the limit() function doesn't matter - the answer is always the middle value, unless two of them evaluate to the same value, in which case that's the answer. This very thing was discussed recently. Don't forget, all three arguments could be variables.

The B-source expression can further be simplified and improved to:

I=if(V(vsoc1)>0,I(R10),0)

..because V(SOC1) cannot be greater than 1, so long as the analysis time doesn't exceed the length of the PWL, in which case everything goes pear-shaped, anyway.

--
Regards,
Tony


Re: Scaling a lithium ion battery schematic

 

Tony, since limit(x,y,z) is? equivalent to min(max(x,y),z)
shouldn't your original limit expression
B3 vsoc1 0 I=limit(0,1,V(vsoc1))*I(V1)
have been written as
B3 vsoc1 0 I=limit(V(vsoc1),0,1)*I(V1)
although it doesn't seem to matter in this case.


Re: Scaling a lithium ion battery schematic

 

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This certainly appears to be a bug to me. Thanks for reporting it to us, at least.

Donald

On 2023-07-04 06:57, Tony Casey wrote:

On 04/07/2023 00:00, Tony Casey wrote:
It may or may not be more convergence friendly, but your mod for B3 has changed the discharge to be an incremental function of SOC, which it wasn't before. The given discharge defined by I1 is presumably important, but that's not been preserved.

--
Regards,
Tony?

On 3 Jul 2023 20:50, "eetech00 via groups.io" <eetech00@...> wrote:
Some suggestions:

C4 N001 batt1 1000p Rpar=0.1?? <-Rpar replaces resistor
C5 N002 N001 10u Rpar=0.1????? <-Rpar replaces resistor
C6 vsoc1 0 6480 Rpar=10k???????? <-Rpar replaces resistor
B3 vsoc1 0 I=limit(0,1,V(vsoc1))*I(V1)??????????? <-simplified, convergence friendly
I1 N002 N003 PWL file=Test_PWL_2mod.txt <--remove unused lines in file (containing tabs only)
E1 batt1 0 vsoc1 0 table=(trimmed out values for this explanation)
V1 N003 0 0????????????????????????????????? <-current meter replaces resistor
.tran 35000
* Voc
.ic V(vsoc1)=1
.backanno
.end
More...

The limit() function in the B-source produces an exponential decay of SOC1, instead of a linear one, but it never reaches zero before flipping. Extending the analysis time, we see that the problem is that the last time coordinate in the Test_PWL_2mod.txt file is 38000.01s, at which the value is -1. Therefore this means that beyond time=42300.365s, when SOC1 reaches 1, the battery is then charged at 1A forever, i.e. the voltage rises up to the maximum value specified in the SOC characteristic table of E1, 27.91842V, at which it remains forever.

This problem was in the original schematic that was uploaded, which had an analysis time of 70000s. In my modified file, I shortened this to 35000, which was sufficient to complete the discharge, but which hid this issue.

There's another, much more subtle issue. If you look in the (original) PWL text file, you see this sequence repeated:

0.01??? -1
0.21??? -1
0.21??? 0.984848485
0.31??? 0.984848485
0.31??? 2.954545455
0.41??? 2.954545455
0.41??? 0.984848485
0.51??? 0.984848485
0.51??? 0
0.81??? 0
0.81??? 0.492424242
1.21??? 0.492424242
1.21??? 0


If you zoom into I(I1) in the waveform viewer (or set the total analysis time to 10s or so), you would expect to see that between 0.51s and 0.81s the current is zero. But that is not what you see. Similarly, between 0s and 0.21s, you should see -0.9848A. Again, you don't see that. Similarly, between 0.81s and 1.21s it should be constant at 0.4924A, but it's not. And, in fact, nowhere does the current actually reach 2.9545A. The highest value it gets to according to the trace marker is 1.9696A. As it happens, 1.9696A is exactly midway between 0.9848A and 2.9545A. Similarly, between 0.51s and 0.81s, instead of zero, you get 0.2462A, which is exactly half of 0.4922A.

So, the actual I(I1) waveform is nothing like the PWL table. For this battery simulation, the discharge time is completely wrong and way optimistic. If you average what the current the PWL should give you for the first 1.21s, the answer is 0.73611V. What you actually get is 0.42703A.

What LTspice is clearly doing is that when it encounters duplicated timesteps, it averages the corresponding amplitudes. No mention in the ErrorLog. WTF! So, what should it do? I'd say, it should flag an error because you can't have two different values and the same time. I might have expected it would discard any repeated timestep, but it doesn't do that either.

Just out of curiosity, I typed just the above values into the the PWL(t) dialogue box. Same result. No warning or error message. At least that was consistent.

Someone please tell me if this is a known feature, because I've not encountered it before. But then, I would never have typed in duplicated timesteps before.

If anyone agrees this is bug, I will submit a report.

--
Regards,
Tony


Re: Scaling a lithium ion battery schematic

 

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On 03/07/2023 22:56, apotorski@... wrote:
Thank you for pointing this out. This taught me a lot!
In case you haven't read any of the later messages, you should note that the discharge times the simulations produce are very optimistic because the PWL isn't working as expected. This is to do with the duplicated timesteps in the PWL, which are not interpreted as you might expect. I'm guessing that this might have arisen in a translation from Excel, because Excel accepts duplicated X values (timesteps) and plots instantaneous transitions. In reality, this is not possible, and LTspice deals with it in a different and quite unexpected way.

--
Regards,
Tony


Re: Scaling a lithium ion battery schematic

 

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On 04/07/2023 12:57, Tony Casey wrote:
Similarly, between 0s and 0.21s, you should see -0.9848A.
I meant: ..between 0s and 0.21s, you should see -1A.

--
Regards,
Tony


Re: Scaling a lithium ion battery schematic

 
Edited

On 04/07/2023 00:00, Tony Casey wrote:
It may or may not be more convergence friendly, but your mod for B3 has changed the discharge to be an incremental function of SOC, which it wasn't before. The given discharge defined by I1 is presumably important, but that's not been preserved.
?
--
Regards,
Tony?

On 3 Jul 2023 20:50, "eetech00 via groups.io" <eetech00@...> wrote:
Some suggestions:

C4 N001 batt1 1000p Rpar=0.1?? <-Rpar replaces resistor
C5 N002 N001 10u Rpar=0.1????? <-Rpar replaces resistor
C6 vsoc1 0 6480 Rpar=10k???????? <-Rpar replaces resistor
B3 vsoc1 0 I=limit(0,1,V(vsoc1))*I(V1)??????????? <-simplified, convergence friendly
I1 N002 N003 PWL file=Test_PWL_2mod.txt <--remove unused lines in file (containing tabs only)
E1 batt1 0 vsoc1 0 table=(trimmed out values for this explanation)
V1 N003 0 0????????????????????????????????? <-current meter replaces resistor
.tran 35000
* Voc
.ic V(vsoc1)=1
.backanno
.end
More...

The limit() function in the B-source produces an exponential decay of SOC1, instead of a linear one, but it never reaches zero before flipping. Extending the analysis time, we see that the problem is that the last time coordinate in the Test_PWL_2mod.txt file is 38000.01s, at which the value is -1. Therefore this means that beyond time=42300.365s, when SOC1 reaches 1, the battery is then charged at 1A forever, i.e. the voltage rises up to the maximum value specified in the SOC characteristic table of E1, 27.91842V, at which it remains forever.

This problem was in the original schematic that was uploaded, which had an analysis time of 70000s. In my modified file, I shortened this to 35000, which was sufficient to complete the discharge, but which hid this issue.

There's another, much more subtle issue. If you look in the (original) PWL text file, you see this sequence repeated:

0.01??? -1
0.21??? -1
0.21??? 0.984848485
0.31??? 0.984848485
0.31??? 2.954545455
0.41??? 2.954545455
0.41??? 0.984848485
0.51??? 0.984848485
0.51??? 0
0.81??? 0
0.81??? 0.492424242
1.21??? 0.492424242
1.21??? 0


If you zoom into I(I1) in the waveform viewer (or set the total analysis time to 10s or so), you would expect to see that between 0.51s and 0.81s the current is zero. But that is not what you see. Similarly, between 0s and 0.21s, you should see -1A. Again, you don't see that. Similarly, between 0.81s and 1.21s it should be constant at 0.4924A, but it's not. And, in fact, nowhere does the current actually reach 2.9545A. The highest value it gets to according to the trace marker is 1.9696A. As it happens, 1.9696A is exactly midway between 0.9848A and 2.9545A. Similarly, between 0.51s and 0.81s, instead of zero, you get 0.2462A, which is exactly half of 0.4922A.

So, the actual I(I1) waveform is nothing like the PWL table. For this battery simulation, the discharge time is completely wrong and way optimistic. If you average what the current the PWL should give you for the first 1.21s, the answer is 0.73611V. What you actually get is 0.42703A.

What LTspice is clearly doing is that when it encounters duplicated timesteps, it averages the corresponding amplitudes. No mention in the ErrorLog. WTF! So, what should it do? I'd say, it should flag an error because you can't have two different values at the same time. I might have expected it would discard any repeated timestep, but it doesn't do that either.

Just out of curiosity, I typed just the above values into the the PWL(t) dialogue box. Same result. No warning or error message. At least that was consistent.

Someone please tell me if this is a known feature, because I've not encountered it before. But then, I would never have typed in duplicated timesteps before.

If anyone agrees this is bug, I will submit a report.

--
Regards,
Tony