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Re: plotting the difference of voltages

John Woodgate
 

In message <CAK-wn_46VVk4kRHPLiArsHmsDFgdzV=ec+1xnWs1oo86_Q29oA@...>, dated Sun, 25 May 2014, "Sam Jesse revrvr@... [LTspice]" <LTspice@...> writes:

In Files/Temp/ transformer.asc
Please help me understand why V(Out_1,Out_2) is going to negative numbers, I expected to see it from zero to 40v and back to zero, since plotting V Out_1 looks like a mirror of V Out_2.
You can easily see that V1 is sometimes a positive voltage and at other times a negative voltage, while V2 is opposite. So (V1-V2) is sometimes a positive number and sometimes a negative number.

Think about the 'number line', which has zero in the middle, positive numbers going off to the right and negative numbers going off to the left. Then consider adding +3 to -2 and subtracting, first +4 from +2 and then +2 from -3.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
Nondum ex silvis sumus
John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK


plotting the difference of voltages

Sam Jesse
 

Hi

In Files/Temp/ transformer.asc
Please help me understand why V(Out_1,Out_2) is going to negative numbers, I expected to see it from zero to 40v and back to zero, since plotting V Out_1 looks like a mirror of V Out_2.



Thank you


Re: Analog multiplier - wrong simulation or flaw in the circuit?

 

You hit the nail again, Helmut.

Gracias!!


Re: SMPS switching losses in LTspice?

 

The lack of such information suggests that the transistor might not be a good choice for this use.

Jim Wagner
Oregon Research Electronics

On May 24, 2014, at 4:51 PM, sawreyrw@... [LTspice] wrote:

?

potrstuvich,

The data sheet specifies the gate drive voltage, Rg, Id and Vds.? A MOSFET is almost always specified with an inductive load which means the load current is essentially constant during switching.? Therefore, your test circuit should use Rg and Vg in the gate and a current source connected to the drain.? The drain voltage should be clamped to a maximum voltage of the Vds spec.?

Regarding Cgd in the model, you should be able to get a sense of whether the model is reasonable given the data sheet value.? Someone else suggest you should also look at the Qgs spec, and I agree.

The net net is that you can build a test circuit to get a reasonable engineering estimate of the "goodness" of the model.

Rick



Re: SMPS switching losses in LTspice?

 

potrstuvich,

The data sheet specifies the gate drive voltage, Rg, Id and Vds.? A MOSFET is almost always specified with an inductive load which means the load current is essentially constant during switching.? Therefore, your test circuit should use Rg and Vg in the gate and a current source connected to the drain.? The drain voltage should be clamped to a maximum voltage of the Vds spec.?

Regarding Cgd in the model, you should be able to get a sense of whether the model is reasonable given the data sheet value.? Someone else suggest you should also look at the Qgs spec, and I agree.

The net net is that you can build a test circuit to get a reasonable engineering estimate of the "goodness" of the model.

Rick


Re: SMPS switching losses in LTspice?

 


the mosfet I amusing in LTspice is

BSC159N10.

its datasheet gives no switching tests with which I can simulate and compare.

So there is no way of me knowing whether or not the 1.07W of switching loss I get for this model is accurate.

This fet is the one provided by the ltspice program.

If you click it, the model just says cgd(min) = 15p and c(gd)max = 450p.

?

I am going to have to conclude that I don't know whether or not the switching losses in ltspice for this particular model are accurate enough.

I understand? that ltspice is capable of doing this, but don't know how to write the model statement for that BSC fet, and dont know how to analyse the model statement for the fet in the ltspice program.


Re: Analog multiplier - wrong simulation or flaw in the circuit?

 

Hello Augustinto,

There are two problems in your circuit.

1. The offset adjust circuit only works with a very few hundred milli Volts. See my test circuit.



2. Your Opamps require a feedback capacitor of a few ten pico Farads.


The folder with the circuits:

?

It's also very important to use matched transistors.

1. Use matched quad transistors! MAT04, MAT14, THAT300, 2nd choice CA3046, CA3086, CA3127
2. Don't forget decoupling capacitors of > 0.1uF from +V to GND and -V to GND and a real circuit!

Best regards,
Helmut


Re: SMPS switching losses in LTspice?

 

You can get some idea of the accuracy by examining the Vgs during the switching interval. If Qg is similar to the datasheet, then Cdg is correctly included.
Losses in capacitance will also reflect in the power loss of the driving element and series limiters.

RL


Analog multiplier - wrong simulation or flaw in the circuit?

 

I run across the schematic shown in page 13 of the RC4136's datasheet (uploaded). After 3 days trying to have it "working" in LTSpice (uploaded) I realized I need help.?

I tend to think I know the basics of log / antilog amps and I understand this circuit would give (hopefully) a Vout = Vy * Vx / Vz. Instead, the prevailing result I get is Vout slightly above Vx, no matter what Vy or Vz are.?

With different op amps, or no matter how many diodes I pile up at the top (to get up to around 3.5V) to polarize the first stages, I always get a result not even close to the expected (and most of the times with >1 MHz noise riding the output).?

I am puzzled by what is wrong: my simulation or the circuit??


Sorry but I am not sure if I uploaded both files (RC4136 datasheet and Analog mutiplier 03.asc in the right place)



Re: I can not find the file "Zip-files with all files from this group"

 

Hello Cristian,

The zip-files are in the Yahoo group LTspiceFiles. See the link below.




?

Best regards,
Helmut

?


I can not find the file "Zip-files with all files from this group"

 

I can not download the file " Zip-files with all files from this group".
Any help is welcome . Best regards Cristian



LM2917 F/V Tachometer simulation problem

 

A few days ago, 'hitec92407' uploaded the file "LM2917Test.zip" to the group's Temp area. ?Through my mistake, the discussion ended up on the [LTspiceFiles] group rather than this one.

hitec92407's questions included these:

He created a dual-collector transistor model. ?He was unsure about it.

My response: It looks good to me. ?I think you did it right and I don't think it is why the simulation doesn't work.

He noticed the output of the tach circuit always stays the same and doesn't do what it should.

My responses follow.

The circuit, taken right out of Figure 14 in National Semi's Applications Note AN-162, is peculiar because the on-chip "ground" (VSS?) pin is not grounded. ?It is connected to a point that is nominally half-way between power and actual ground. ?That means some of the signal pins are well below on-chip VSS. ?Usually the on-chip VSS is the substrate, and nothing should ever be more negative than that. ?It just doesn't seem right.

I have a strong suspicion that Figure 14 might not actually work.

In addition, there might be problems with the IC model too, in spite of the fact that it looks like a faithful replica of their Figure 2. ?The on-chip regulator is a few volts off. ?The input pin has a 10K series resistor, which seems to prevent the input from noticing zero-crossings (i.e., it's impossible to bring pin 1 low enough to ever toggle the Schmitt trigger ... so it never sees any AC input!). ?There may be issues with mismatch between diodes and transistors, which prevents some transistors from ever turning on. ?Those are the problems I saw so far.

I can see nothing happening in the Charge Pump. ?Its input seems to be forever stuck high. ?The problem starts in the input hysteresis amplifier.

It might be possible to "patch up" your LM2917 schematic and make it work, but there may be a better approach. ?There already is an LM2917 LTspice model in this group's Files section. ?It is not in schematic form, and I can give no guarantee about how accurate it is, but apparently someone found it useful enough to upload it here. ?Try it out.

Regards,
Andy



Re: SMPS switching losses in LTspice?

 

potstuvich,

I don't think it's a question of how accurate is LTspice, but instead, how good is the transistor model?? If I really wanted to know the answer to this, I would build a switching time test circuit that matches that used in the data sheet and see how the results compare to the data sheet.? I realize there is not much information on the data sheet, but it's better than nothing.? I would also compare the data sheet capacitancs to the model.

Rick


Re: SMPS switching losses in LTspice?

 

I would expect it to be modestly accurate, then.

Jim Wagner

On May 23, 2014, at 1:19 PM, potstuvich@... [LTspice] wrote:

?


I am using the mosfet model of a mosfet provided by LTspice itself. So will the switching losses be accurate?

The inductor in the real circuit will not saturate at the peak fet current level.

Gate drive losses are around 10mW here.




Re: SMPS switching losses in LTspice?

 


I am using the mosfet model of a mosfet provided by LTspice itself. So will the switching losses be accurate?

The inductor in the real circuit will not saturate at the peak fet current level.

Gate drive losses are around 10mW here.


Re: SMPS switching losses in LTspice?

 

Should have written, instead of "losses will be mostly resistive" it ought to be "inductor losses will be mostly resistive" since gate charge losses CAN be significant.

Jim Wagner
Oregon Research Electronics

On May 23, 2014, at 12:54 PM, Jim Wagner wagnejam99@... [LTspice] wrote:

?

Those voltage dependent FET capacitances are modeled well, if a good model is supplied, For an external FET switcher, that is up to you.


The switching loss estimate is as good as your model. For example, if the inductor stays well away from saturation, then the losses there will be mostly resistive. If you have a reasonable series resistance in that model, then its good. But, if it is driven into saturation and you do not have a model that includes saturation, then the loss number will be overly optimistic, maybe by a lot.

Jim Wagner
Oregon Research Electronics

On May 23, 2014, at 12:43 PM, potstuvich@... [LTspice] wrote:

?

Hello,

LTspice calculates a switching loss of 1.07W in the FET of the buckboost smps that I have uploaded to the Temp Files area. "Buckboost SMPS _switching loss.asc".

How accurate is this to the real circuit? I mean, the switching Mosfet capacitances, especially Cgd, are voltage dependent, and this would need modelling to make the switching losses accurate. How accurate is it in LTspice?






Re: SMPS switching losses in LTspice?

 

Those voltage dependent FET capacitances are modeled well, if a good model is supplied, For an external FET switcher, that is up to you.

The switching loss estimate is as good as your model. For example, if the inductor stays well away from saturation, then the losses there will be mostly resistive. If you have a reasonable series resistance in that model, then its good. But, if it is driven into saturation and you do not have a model that includes saturation, then the loss number will be overly optimistic, maybe by a lot.

Jim Wagner
Oregon Research Electronics

On May 23, 2014, at 12:43 PM, potstuvich@... [LTspice] wrote:

?

Hello,

LTspice calculates a switching loss of 1.07W in the FET of the buckboost smps that I have uploaded to the Temp Files area. "Buckboost SMPS _switching loss.asc".

How accurate is this to the real circuit? I mean, the switching Mosfet capacitances, especially Cgd, are voltage dependent, and this would need modelling to make the switching losses accurate. How accurate is it in LTspice?




SMPS switching losses in LTspice?

 

Hello,

LTspice calculates a switching loss of 1.07W in the FET of the buckboost smps that I have uploaded to the Temp Files area. "Buckboost SMPS _switching loss.asc".

How accurate is this to the real circuit? I mean, the switching Mosfet capacitances, especially Cgd, are voltage dependent, and this would need modelling to make the switching losses accurate. How accurate is it in LTspice?


Re: Lock horizontal axis

 

Hell Stephen,

I just tried with your mentioned setting and it works.

Plot Settings -> Sync horizontal axis

Best regards,
Helmut


Re: Pull-Push transformer for valve amp in LTspice

 

¿ªÔÆÌåÓý

Tip:
Ferrite cores are identified by an Al number, which allows quick determination of the number of turns, using the formula
L=Al.N?

Le 23/05/2014 15:15, pha0001@... [LTspice] a ¨¦crit?:

?

Thank you so much!!! Things are starting to become much clearer now.


If you don't mind, may I ask, why did you take a quarter of the total primary inductance? Why not just half it??

? ?