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Re: NCS2001

 

I get "timestep too small".
?
Is that NOT the error you see?

Andy
?


Re: Lateral PNP In Model of 741 Internal Architecture

 

Hi Andy,
?
Thanks for the suggestion - I'll take a look at that example and the built-in LPNP model.

Your point about the antiquity of the device is well-taken. I'm working on learning some more in-depth analog design and the 741 seemed like a good foundational block given how widely documented it is, and then able to use that to move into more advanced/modern circuits.


NCS2001

 

Trying to get this opamp model to work. I keep getting errors. I know it has to do with the "TABLE" lines, but not sure how to fix. Model was pulled from OnSemi's website.
?
File is posted in the temp section as NCS2001_test.zip


Re: How can I create a continuously (kind of) varying duty cycle in one simulation

 

On Wed, Apr 9, 2025 at 04:47 PM, <kmesne@...> wrote:
I am trying to create a duty cycle that kind of continuously varying like in a 200ms simulation I want a duty cycle start from 0.01 to 0.99 ?(approximately 0.01 Duty increase per 2 ms). How can I do this I am really struggling with it .?
If I were to do this, I would use something like the one suggested by Donald.? I prefer it because I think it is easy to visualize how it gives you the? varying duty cycle, and it might be close to how you would build it in hardware.? But I have two differences from Donald's example:
?
(1)? Donald's example (DutyCycleModulator.zip) needs a Maximum Timestep.? Without it, it works but LTspice uses far too few timepoints to get good signal edges.
.tran 0 200m 0 10u
.options plotwinsize=0? ?; <-- Disables waveform compression
?
(2)? Instead of Donald's voltage-controlled switch S1, I would use a comparator, to compare the voltage ramp with the triangle or sawtooth wave.? LTspice's "diffschmitt" element works well for this, even if you omit the hysteresis of the Schmitt function.
?
I uploaded an example, VaryingDutyCycle.asc, in the Temp folder.
?
Andy
?


Re: Lateral PNP In Model of 741 Internal Architecture

 

Manauo,
?
Have you looked at this schematic, that comes with LTspice?
...\examples\Educational\LM741.asc
I don't know how it compares to your efforts, but it is another one to consider.? I'm guessing that one just copied the "equivalent" schematic from the old 741 datasheet, without much more effort.
?
I do not recall seeing anyone attempt to accurately model the transistors in a 741 before.? I think your question is unique.? Be aware that the 741 is ancient history.? Personally, I might question the validity of anything that talks about its design, even though it may be OK.? ?How well do you trust its source?
?
Did you know that LTspice has both a different PNP symbol and a different PNP model for lateral PNP transistors?? The symbol is "LPNP" and has the base-to-substrate diode and the connection to the P-type substrate (negative supply).? Don't be fooled by the PNP4 symbol which is not for a lateral PNP - but anyway that is just a symbol, not the model.
?
The lateral PNP's model name is also "LPNP" so I think you would write something like this:
.model 741P LPNP (Bf=50 ...
to get that lateral PNP model that comes with SPICE.? I do not often see it used.? (FYI, there is even a lateral NPN model, probably never used, but it is there in case someone were to make ICs from an N substrate.)? If I remember correctly, these LPNP and LNPN models are not unique to LTspice and they come with other SPICE programs too, perhaps even with Berkeley SPICE, but documentation about them is scarce.? I don't know what sets them apart from normal PNP and NPN SPICE models.? I would expect that they work best when they have the fourth pin (to substrate) in each of those LPNP transistors in your circuit.
?
I do not know if changing those models from PNP to LPNP makes much difference.? I did some experiments many years ago but I didn't finish them.
?
Do you suppose that a forward Beta of 50 is reasonable for a lateral PNP?? I would have thought that it is much lower.? But don't take my word on that.? Back in the early days of analog ICs, a Beta of 50 would have been good for a normal NPN and impossible for a lateral PNP.? Again, don't take my word on that.
?
Andy
?


Re: Lateral PNP In Model of 741 Internal Architecture

 

Edit: Schematic is uploaded in files/temp, "741.asc"


Lateral PNP In Model of 741 Internal Architecture

 

Hi,

I'm sure this has been asked before but in searching I couldn't find anything that addressed my issue, so apologies if this is a duplicate.

As an exercise I'm modeling the 741 op-amp internal structure (from this ) but I can't get the lateral PNP to behave as expected (Q13A/B). I get the expected 730uA through the reference current mirror, and the expected ~20uA through the Q20 mirror. But through Q13B I should be sourcing 0.75*Iref and I'm only getting ~12uA; similarly through Q13A i should be sourcing 0.25*Iref and I'm only getting 75pA.

Model statements used for all parts are in the schematic. The only difference between Q13 and the standard PNP used is the saturation current Is changed from 10fA (standard) to 7.5fA (Q13B) and 2.5fA (Q13A). Apparently I'm missing something else about how this stage is supposed to function, seemingly with Q13. Any ideas to get this working?


Re: Trying to understand how MPPT works in a buck converter with resistive load (heating rod)

 

Hi, :
?
Here is a reference demo for MPPT,?
?
Thanks to the ADI's kindly sharing. Help to utilize the sunlight everywhere.
?
Wish you all happy.
Best regards.
?
On Thu, Apr 10, 2025 at 05:41 AM, <kmesne@...> wrote:

Hi, I am trying to understand how MPPT works in a buck converter with resistive load by doing an LTSpice simulation. I have a PV model which works very accurately with a current sink load. And it works perfectly as in figure below (I can also change irradiance and its very accurate with the datasheet)

But when I use a buck converter with a resistive load I can not achieve the left part of the IV curve. I am changing the duty cycle from 0 to 0.98 continuously (kind of) in 0.12s. I cant get the left part and I think this is logical because with a resistor at the output load there is no way that voltage will increase but current stay constant because resistor is a passive load. As in the figure below

I added the figures in the folder "MPPT Resistive Load"?

?

Why I cant go to the left part of the IV curve ?


Re: Trying to understand how MPPT works in a buck converter with resistive load (heating rod)

 

On Thu, Apr 10, 2025 at 03:11 AM, <kmesne@...> wrote:
Hi, I am trying to understand how MPPT works in a buck converter with resistive load by doing an LTSpice simulation. I have a PV model which works very accurately with a current sink load. And it works perfectly as in figure below (I can also change irradiance and its very accurate with the datasheet)
Hello,
?
What are your panel parameters (Vov, Isc, Vmpp, Impp etc.)? What kind of algorithm are you using (Perturb and Observe (PnO), Incremental Conductance (InC) etc.)? What is your MPPT frequency? For how much time are you running your simulation?

I am assuming that it is a PnO algorithm. Your system cannot reach Maximum Power Point (MPP) if it is under light load condition. I have attempted MPPT simulations in MATLAB and there I never experienced what you mention as: "I cant get the left part and I think this is logical because with a resistor at the output load there is no way that voltage will increase but current stay constant because resistor is a passive load.".
?
What if the time needed by your simulation to converge is more than the run itself? In such a case as well you will never reach MPP. My suggestions are:
1) Increase the power consumption at the load end (somehow bring your system operating point from no load/partial load to full load).
2) Increase the simulation run time.
?
BTW, just curious, are you using the average values of your PV voltage and current as input to your MPPT algorithm?

With Regards,
Ankit


Re: Trying to understand how MPPT works in a buck converter with resistive load (heating rod)

 

¿ªÔÆÌåÓý

The "left" part of the I-V curve with the current load is physically unrealisable because it requires the rail Vpv400W to go negative. This can't happen with a resistive load. Try adding the "LOAD" parameter to the current source. Ideal current sources don't exist in the real world.

--
Regards,
Tony

On 09/04/2025 23:41, kmesne via groups.io wrote:

Hi, I am trying to understand how MPPT works in a buck converter with resistive load by doing an LTSpice simulation. I have a PV model which works very accurately with a current sink load. And it works perfectly as in figure below (I can also change irradiance and its very accurate with the datasheet)

But when I use a buck converter with a resistive load I can not achieve the left part of the IV curve. I am changing the duty cycle from 0 to 0.98 continuously (kind of) in 0.12s. I cant get the left part and I think this is logical because with a resistor at the output load there is no way that voltage will increase but current stay constant because resistor is a passive load. As in the figure below

I added the figures in the folder "MPPT Resistive Load"?

?

Why I cant go to the left part of the IV curve ?



Re: How can I create a continuously (kind of) varying duty cycle in one simulation

 

On Thu, Apr 10, 2025 at 05:38 AM, <ankitk.ace@...> wrote:
Hello,

There's a similar kind of question which is better than what I have suggested.
?
With Regards,
Ankit
Hi, :
?
This may also enable your joy ,similar to the website. By sample & hold.
?
Wish you happy.
?
Version 4
SHEET 1 1224 680
WIRE 128 64 32 64
WIRE 336 112 304 112
WIRE 128 160 64 160
WIRE 32 272 32 64
WIRE 32 272 -160 272
WIRE 128 272 32 272
WIRE -160 288 -160 272
WIRE 336 320 304 320
WIRE 64 336 64 160
WIRE 128 336 64 336
WIRE -160 384 -160 368
WIRE 64 400 64 336
WIRE 64 512 64 480
FLAG 64 512 0
FLAG -160 384 0
FLAG 336 112 A
FLAG 336 320 B
FLAG -160 272 IN
SYMBOL SpecialFunctions\\sample 208 96 R0
SYMATTR InstName A1
SYMBOL SpecialFunctions\\sample 208 304 R0
SYMATTR InstName A2
SYMBOL voltage -160 272 R0
WINDOW 3 -171 163 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1 0 5m 5m 0 10m 10)
SYMATTR InstName V1
SYMBOL voltage 64 384 R0
WINDOW 0 18 18 Left 2
WINDOW 3 23 97 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 1u 1u 50u 100u)
TEXT 472 528 Left 2 !.tran 10m
TEXT 208 552 Top 1 ;also refer to informational/educational purposes only.
TEXT 360 112 Left 2 ;This output follows the input whenever the S/H input is true.
TEXT 360 320 Left 2 ;This output latches to the input when the CLK input goes TRUE.
TEXT 208 -8 Bottom 2 ;The behavioral Sample and Hold has two modes of operation.
TEXT -272 600 Left 2 ;refer to: https://electronics.stackexchange.com/questions/603970/is-there-a-way-to-simulate-this-in-ltspice


Re: How can I create a continuously (kind of) varying duty cycle in one simulation

 

¿ªÔÆÌåÓý

I've uploaded /g/LTspice/files/Temp/DutyCycleModulator.zip which uses a switch, a ramp, and a triangle voltage to approximate your desire.

Donald.

On 4/9/25 16:47, kmesne via groups.io wrote:

Hi,?

I am trying to create a duty cycle that kind of continuously varying like in a 200ms simulation I want a duty cycle start from 0.01 to 0.99 ?(approximately 0.01 Duty increase per 2 ms). How can I do this I am really struggling with it .?

Thanks


Trying to understand how MPPT works in a buck converter with resistive load (heating rod)

 

Hi, I am trying to understand how MPPT works in a buck converter with resistive load by doing an LTSpice simulation. I have a PV model which works very accurately with a current sink load. And it works perfectly as in figure below (I can also change irradiance and its very accurate with the datasheet)

But when I use a buck converter with a resistive load I can not achieve the left part of the IV curve. I am changing the duty cycle from 0 to 0.98 continuously (kind of) in 0.12s. I cant get the left part and I think this is logical because with a resistor at the output load there is no way that voltage will increase but current stay constant because resistor is a passive load. As in the figure below

I added the figures in the folder "MPPT Resistive Load"?

?

Why I cant go to the left part of the IV curve ?


Re: How can I create a continuously (kind of) varying duty cycle in one simulation

 

Hello,
?
I am fairly new to LTspice, so my suggestion may not be the best way to go about implementing what you are looking for. However, can the following trick help you?

PWL(repeat forever 0 0.01 1.99m 0.01 2m 0.02 3.99m 0.02 4m 0.03 5.99m 0.03 6m 0.04 7.99m 0.04 7.999m 0.01 endrepeat)

I have ended at 8 milliseconds. You will have to go until 199.99m 0.99 199.999m 0.01 endrepeat.
This is not an optimal solution but the only way I could come up with.

There's a similar kind of question which is better than what I have suggested.
?
With Regards,
Ankit


Re: How to simulate the gate charge characteristic given in the datasheet of a mosfet?

 

Dear Dennis,
?
A very good day to you. Again thanks a lot for explaining the insights on how to use .meas intelligently. I am grateful to you, teacher.
?
I looked at figure 5 of the white paper carefully. You are correct. I was confusing Ton (Toff) with the time period during which Eon (Eoff) need to be calculated. Now I understand the difference clearly.
?
Amidst all the discussion I overlooked some of the key concepts that are essential to these simulations and I can certainly use a second opinion from you.
?
1) Double Pulse Test (DPT) is used for device characterization and estimating these parameters. Am I correct? Links such as , , and evaluated the Eon and Eoff using two pulses, where as in , the evaluation has been done using a single pulse. Your simulation file 2n7002 mosfet Eon also works with a single pulse. Will there be too much of variation in the results between the two approaches?

2) Most semiconductor manufacturers evaluate the performance of the body diode using a DPT. I scrolled through the datasheets of a few didoes (Schottky and Ultrafast Recovery) with ratings 650V, 25A and above. In the datasheets that I looked, I was unable to find a description of the test circuit used to arrive at the results provided in them. I wonder how will the test circuit look like for a diode. Can I use the same circuit as that for a MOSFET, switch it ON and OFF and measure the losses across the diode when it is freewheeling? Will this be a reasonable approach?

3) Does .meas command detect the conditions it is supposed to detect while the simulation is running or after the simulation is over? I am under the assumption that measurement and simulation happen side by side and therefore only known triggers can be detected.

4) Lastly, if the models provided by the manufacturers are well detailed and the simulation has been set up properly will the simulation results be as accurate as the hardware results?

Once again thank you for all the help.

With Regards,
Ankit


How can I create a continuously (kind of) varying duty cycle in one simulation

 

Hi,?

I am trying to create a duty cycle that kind of continuously varying like in a 200ms simulation I want a duty cycle start from 0.01 to 0.99 ?(approximately 0.01 Duty increase per 2 ms). How can I do this I am really struggling with it .?

Thanks


Classic Menu vs Keyboard shortcuts

 

Hi All
?
How can one restore the Classic Menu in LTSpice Version 24.1.6?
?
Regards
ik


Re: "Flaw" in UniversalOpamps

 

On Wed, Apr 9, 2025 at 10:42 AM, <gkhebert2@...> wrote:
...? The model designer(s) of the universal opamp seem to have assumed that all opamps have MOS inputs ...
That might be so, but I personally doubt it.? Just my opinion.

...? Opamps with bipolar input devices have substantially lower differential input impedance than common-mode input impedance ...
That might be why these UniversalOpamp models lack any explicit provision for Rin(CM).? It seems to have been ignored - even though its presence is definitely there in these models, even disproportionately there.
?
...? The also have input bias currents, which are missing from all of the universal opamp models.
That might have been intentional, to give you just the basics of a "universal" op-amp without that particular distraction.? Some bipolar op-amps have input bias cancellation, with an average bias current of zero and a spread around it, both positive and negative.? That makes it difficult to represent in a SPICE model.
?
At the time these UniversalOpamp models were made, which I believe would have been 20 or 25+ years ago, bipolars were the first choice.
?
Andy
?


Re: "Flaw" in UniversalOpamps

 

On Wed, Apr 9, 2025 at 11:09 AM, John Woodgate wrote:

Weren't these models changed soon after AD took over?

Yes and no.
?
They were re-packaged with altered symbol and model names.? But as far as I know, the innards of each of the models themselves were unchanged by ADI.
?
Andy
?


Re: "Flaw" in UniversalOpamps

 

¿ªÔÆÌåÓý

Weren't these models changed soon after AD took over?

On 2025-04-09 16:04, Andy I via groups.io wrote:
It seems as if whoever designed these Universal Opamps gave no thought whatsoever to a common-mode input impedance.? Not one of them has a parameter for that.
?
If you ground either input pin and measure the impedance between the input pins, you get what appears to be an impedance between the pins of Rin, so you can fool yourself by doing that.
?
I assumed it was Mike Engelhardt who made these models.? I am guessing he just overlooked this.
?
Andy
?
--
Best wishes John Woodgate RAYLEIGH Essex OOO-Own Opinions Only If something is true: * as far as we know - it's science *for certain - it's mathematics *unquestionably - it's religion

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