Re: Multiplying DACs with Serial Interface AD5453
solalong128 wrote, " has anyone found a close alternative that they could share?" about a multiplying DAC. Searching the group's Files for "MDAC", I see this one: Files > z_yahoo > Lib > DAC8408 /g/LTspice/files/z_yahoo/Lib/DAC8408Maybe there are others.? I recall seeing SPICE models for the DAC08, but that was decades ago. Andy
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Multiplying DACs with Serial Interface AD5453
There seems to be no model of any multiplying DACs on LTSpice, has anyone found a close alternative that they could share?
Thanks in advance
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Mike Engelhardt did an interview.
I just want to alert everyone that didn't know Mike Engelhardt did an interview earlier this month.
You can watch it on youtube .
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Re: create NMOS model from SPICE device model of VISHAY
I didn't mention SQ3426EV_PS_RC.lib because it's not relevant. It's
a thermal model.
I also didn't suggest creating a symbol for it. You can use the
standard LTspice NMOS symbol, as I previously mentioned:
Place the standard LTspice?NMOS symbol in
your schematic. Ctrl-right-click on the placed symbol to open the
Component Attribute Editor:
- Change the "Value" attribute from "NMOS" to "SQ3426EV"
- Change the "Prefix" attribute to "X"
Then add:
.lib SQ3426EV_PS.LIB
I don't know why people think they always have to create a custom
symbol for standard parts. It makes life much more complicated. The
use of "autogenerated" symbols is a constant issue for people that
want to share schematic, because:
- It adds the model file name to the "ModelFile" attribute of
the symbol.
- Places the symbol in the "AutoGenerated" folder.
Both of these these features frustrates the sharing process,
because users forget that other people don't have those files.
--
Regards,
Tony
On 12/05/2024 10:12, john23 wrote:
I have opened the ?SQ3426EV_PS.LIB
in LTSPICE and created a symbol from the netlist file and it
ran .Is it a good alternative ?
also
which model? why did you choose? SQ3426EV_PS.lib and not
SQ3426EV_PS_RC.lib?
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Re: create NMOS model from SPICE device model of VISHAY
Hello Tony , I have opened the ?SQ3426EV_PS.LIB in LTSPICE and created a symbol from the netlist file and it ran .Is it a good alternative ?
also which model? why did you choose? SQ3426EV_PS.lib and not SQ3426EV_PS_RC.lib?
Thanks.
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There are battery models in the group¡¯s file section.
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Hi Andy,
Yes, you are?correct about the circuit. I have added esr to C3 and works the?way it is expected from the circuit.
In my circuit, C3 with 800mF represents the battery and I have added a 35mOhms resistor to it.
However, I like to simulate with a more realistic Model.
So please share a battery?Model if you remember?one.??
Thanks and Regards,
Ray K.
Ray K. asked about a simulation, I think because of current spikes through C3 that were not also through L1 and R1.
Ray, let's think about your circuit.? I(L1) and I(R1) must be the same because they are in series and the only other place for that current to go is into the Sense pin of U1.? That current is small compared to the currents through L1 and R1.
However, that current splits three ways: through C2, C6, and C3.? Now C2 and C6 both have a series resistance (Rser), but C3 in your simulation has none (Rser=0), which means that C3 is the best high-frequency capacitor of the three, and it is the one that tries to absorb the smallest voltage changes dv/dt.? Since the voltage V(OUT) is not constant nor constantly ramping, but has small fast wiggles on it, that translates into narrow (<1 ns wide) current pulses through the ideal capacitor C3.
One way to lessen that in the simulation, is to make C3 not quite ideal.? Add some series resistance to C3.
By adding 0.1 ohm to C3, the sharp impulses are virtually gone.? I do not know what is reasonable.? Maybe a little series inductance would help too, but I did not try.
To answer your question about battery models, I have seen several battery models over the years in this group.? To be honest I did not pay much attention to them, and I don't know how "good" any one is at >1 GHz frequencies.? But I have to wonder if phenomena that happen at such high frequencies have any real meaning in this circuit.? If a 10 Amp current spike lasts for 100 ps, is it real and does it matter?? That corresponds to frequencies near 10 GHz, and I think it is unlikely that it could exist in actuality, with reasonable wires.? It is an artifact, caused by simulating with ideal components that don't match reality.? It's not just C3, it might be everything in the circuit.? The simulation has too much bandwidth for its own good.
That's only my opinion.
Andy
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Hi Andy,
Yes, you are?correct about the circuit. I have added esr to C3 and works the?way it is expected from the circuit.
In my circuit, C3 with 800mF represents the battery and I have added a 35mOhms resistor to it.
However, I like to simulate with a more realistic Model.
So please share a battery?Model if you remember?one.??
Thanks and Regards,
Ray K.
Ray K. asked about a simulation, I think because of current spikes through C3 that were not also through L1 and R1.
Ray, let's think about your circuit.? I(L1) and I(R1) must be the same because they are in series and the only other place for that current to go is into the Sense pin of U1.? That current is small compared to the currents through L1 and R1.
However, that current splits three ways: through C2, C6, and C3.? Now C2 and C6 both have a series resistance (Rser), but C3 in your simulation has none (Rser=0), which means that C3 is the best high-frequency capacitor of the three, and it is the one that tries to absorb the smallest voltage changes dv/dt.? Since the voltage V(OUT) is not constant nor constantly ramping, but has small fast wiggles on it, that translates into narrow (<1 ns wide) current pulses through the ideal capacitor C3.
One way to lessen that in the simulation, is to make C3 not quite ideal.? Add some series resistance to C3.
By adding 0.1 ohm to C3, the sharp impulses are virtually gone.? I do not know what is reasonable.? Maybe a little series inductance would help too, but I did not try.
To answer your question about battery models, I have seen several battery models over the years in this group.? To be honest I did not pay much attention to them, and I don't know how "good" any one is at >1 GHz frequencies.? But I have to wonder if phenomena that happen at such high frequencies have any real meaning in this circuit.? If a 10 Amp current spike lasts for 100 ps, is it real and does it matter?? That corresponds to frequencies near 10 GHz, and I think it is unlikely that it could exist in actuality, with reasonable wires.? It is an artifact, caused by simulating with ideal components that don't match reality.? It's not just C3, it might be everything in the circuit.? The simulation has too much bandwidth for its own good.
That's only my opinion.
Andy
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Re: Output impedance mesurment
It should be added that the schematics in the spec sheet with one or more resistors and one or more capacitors are used to simulate ¡°extreme test load conditions¡±. ?They represent standard extreme loads FOR THAT LOGIC FAMILY. They are NOT examples of usable circuits.
Jim Wagner Oregon Research Electronics
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john23,
Be aware that the output of the 74ABT04 is strongly nonlinear, and this greatly affects its output impedance, and how you measure it.
With the output in the High state, and no output current, the output transistor is very nearly "off".? That causes its output impedance to be very large (around 1 Megohm) at that condition with no static output current.? But if you force it to source an output current, the output voltage drops, the output transistor turns "on", and the output impedance falls to less than 100 ohms, maybe less than 10 ohms.
Earlier I asked why you want to know the output impedance.? I ask that again.
Andy
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Re: Output impedance mesurment
john23,
Be aware that the output of the 74ABT04 is strongly nonlinear, and this greatly affects its output impedance, and how you measure it.
With the output in the High state, and no output current, the output transistor is very nearly "off".? That causes its output impedance to be very large (around 1 Megohm) at that condition with no static output current.? But if you force it to source an output current, the output voltage drops, the output transistor turns "on", and the output impedance falls to less than 100 ohms, maybe less than 10 ohms.
Earlier I asked why you want to know the output impedance.? I ask that again.
Andy
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Ray K. asked about a simulation, I think because of current spikes through C3 that were not also through L1 and R1.
Ray, let's think about your circuit.? I(L1) and I(R1) must be the same because they are in series and the only other place for that current to go is into the Sense pin of U1.? That current is small compared to the currents through L1 and R1.
However, that current splits three ways: through C2, C6, and C3.? Now C2 and C6 both have a series resistance (Rser), but C3 in your simulation has none (Rser=0), which means that C3 is the best high-frequency capacitor of the three, and it is the one that tries to absorb the smallest voltage changes dv/dt.? Since the voltage V(OUT) is not constant nor constantly ramping, but has small fast wiggles on it, that translates into narrow (<1 ns wide) current pulses through the ideal capacitor C3.
One way to lessen that in the simulation, is to make C3 not quite ideal.? Add some series resistance to C3.
By adding 0.1 ohm to C3, the sharp impulses are virtually gone.? I do not know what is reasonable.? Maybe a little series inductance would help too, but I did not try.
To answer your question about battery models, I have seen several battery models over the years in this group.? To be honest I did not pay much attention to them, and I don't know how "good" any one is at >1 GHz frequencies.? But I have to wonder if phenomena that happen at such high frequencies have any real meaning in this circuit.? If a 10 Amp current spike lasts for 100 ps, is it real and does it matter?? That corresponds to frequencies near 10 GHz, and I think it is unlikely that it could exist in actuality, with reasonable wires.? It is an artifact, caused by simulating with ideal components that don't match reality.? It's not just C3, it might be everything in the circuit.? The simulation has too much bandwidth for its own good.
That's only my opinion.
Andy
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Hi Team,
I am simulating a 2A battery charger IC, LT3650-8.4? and have measured the current through L1, R1 and capacitor C3.|
C3 is used as a battery pack.
The average and RMS currents through R1 and L1 are identical.
However, the current into capacitor C3 has peaks at levels up to 10A. For that reason I like to ask if anyone has used a different Model for a battery rather than simply a capacitor.
If so, please share the Model.
I will upload the schematic in temp folder.
Thanks,
Ray K.
?
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Re: Output impedance mesurment
Also FYI - Another way to simulate impedance is to drive the output with an AC current source instead of a voltage source.? It is simpler for two reasons:
- By driving 1 Amp and plotting the voltage (or plot the voltage divided by 1A), you get the impedance directly.
- No problem caused by driving the output to the wrong DC voltage.
Andy
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Re: Output impedance mesurment
FYI, many logic gates have different output impedance when driving high, compared to driving low.? That's why you should simulate both cases.? It might be dramatically different when driving neither high nor low, when using the inverter as an "amplifier".
Why do you want to know the output impedance?
By the way, LTspice is spelled "LTspice", not "LTSPICE".
Andy
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Re: simulating 74ABT04 hex inverter in LTspice
john23 wrote, "given the datasheet below, HOw did you deceded to put 50pF on the load?"
I'm not Tony, but here are my thoughts about that:
(A)? Some load ought to be used.? You can never have a real circuit with none.
(B)? 50 pF is a good number.
(C)? The datasheet lists 50 pF in Table 8.? It also shows one or two 500 ohm resistors, which THEY used for their datasheet measurements, but you are not obligated to do that, unless you need to replicate their specs.
Andy
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Re: Output impedance mesurment
john23 wrote, "Did I measured the output impedance correctly in the plot and LTSPICE file i posted?"
No.
But first, let's review one of the basics.? Every upload here must include all LTspice symbols and all SPICE models that did not come with LTspice.? You forgot to include the symbol and the models needed for this simulation.? While you did include the URL to the ZIP file that has them, they should have been included within your upload, especially because those other files are more than a month old.
Back to your question.
You forgot to connect anything to the input pin of the 74ABT04.? I started to write a lot about that, but -- long story short -- you should never do that!? Always connect something to logic gate input pins.? Never let them float.
Then, you short-circuited the ABT04's output pin to ground, by connecting a voltage source that is set to 0 V DC.? What happens if the ABT04 was trying to drive its output High?? That could be bad.
Now, you need to ask yourself what do you mean by the output impedance of the ABT04.? Do you want its output impedance when it drives High?? Or when it drives Low?? Or maybe you want to know its output impedance when it is in the middle, neither high nor low?? (Some engineers use logic inverters as "linear" amplifiers, and then you might want to bias it so that its output is somewhere neither High nor Low.)? Each of these measurements for "output impedance" could have different values.
I recommend setting up at least 2 if not 3 separate circuits, where the input pin is connected High, and Low - and maybe the third case where there is negative feedback around the ABT04 so that it self-biases with its output somewhere around +1.5V.? Or maybe tweak it to make Vout = Vdd/2.? Then, it's probably best to AC-couple the voltage source to the output pin, so that it does not mess with the DC output current.
Andy
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Re: Help converting UCC5304 simplis model into LTSPICE
john23 wrote, "Could you explain how the?t_Vdd and t_Vcci were found numeraclly from the datasheet?"
This is off-topic for LTspice.? But I will try to answer.
Your question is confusing to me.? Are you asking, how did Texas Instruments measure Tvdd and Tvcci to OUT delays for the numbers in their datasheet?? Or how does a user get those numbers from the datasheet?
I think Figures 18 and 19 in their datasheet show clearly what Tvcci+ and Tvdd+ to OUT means, in the table in section 6.10.? When VCCI or VDD ramp up during power-up, there is a delay before the OUT signal begins to respond.? Until that delay has happened, OUT is held low.? When VCCI or VDD ramp down, the delay is nearly zero (<1 us) before the OUT signal changes to low and is held low.
The table in section 6.10 has the numerical values for Tvcci+ and Tvcc+ to OUT delays.? That is where you would find their numerical values from the datasheet.? There are no minimum delay values in that table, so you should assume they COULD (ideally, not really) be as small as 0 us.
If this does not answer your question, please ask again, specifying what you mean.
Andy
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Output impedance mesurment
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Re: simulating 74ABT04 hex inverter in LTspice
Hello Tony,given the datasheet below, HOw did you deceded to put 50pF on the load?
Thanks.
https://www.nexperia.com/products/analog-logic-ics/logic/buffers-inverters-transceivers/inverters/series/74ABT04.html
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Re: Help converting UCC5304 simplis model into LTSPICE
Hello ,In the simulation eetech00 we put VCCi and Vdd with some rise time,Its also shown in the figures 18 and 19 of the datasheet.
Could you explain how the t_Vdd and t_Vcci were found numeraclly from the datasheet?
Thanks.
https://www.ti.com/lit/ds/symlink/ucc5304.pdf?ts=1715453179860&ref_url=https%253A%252F%252Fwww.google.com%252F
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Re: DRV110 simulation issue
No worries. Had it in my archives and thought I¡¯d share.
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On May 11, 2024, at 10:28?AM, leelsuc via groups.io <leelsuc@...> wrote:
?you are the man.? I quickly dropped out the DRV110 idea and picked the MAX22216 which has ample features (aka dump work load to software) .....
thanks, really appreciate that and hope someone can use it on some projects.
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Tony Casey
Ray. Koo