Re: Is it possible to dynamically change a part's location in one simulation ?
Hi, Andy:
I'm sorry, this might be too short (not clear), I forgot to say the FPGA similarity, it simply read a setting file, which configures the cell setting (set or unset), so every different setting file mapping to different FPGA output, if mapping the requirement of this discussion about 'dynamical changing...', maybe the setting file of FPGA could be shorten to a table (from external file) content, or other else. Actually, that what I am thinking and ask for ideas, those hierarchy to implement it in LTspice, what's the better/best methods by combining those LTspice faetures (table, models, subckts, AKO alias, .STEP, etc)
Thank you very much.
Have a nice day!
By the way, another question is, the mentioned 'batch' idea of "dynamically-changing-the-parts-location, etc." before, could you shed some possible ways , if I hope to simplify those configurations of 'topologies' in a simplified 'table' which contain the info of what's set & what's unset, the hierarchy of those .model , subckt in LTspice , what's the best looking can it be as clear as possible for easy-reading.
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Re: Is it possible to dynamically change a part's location in one simulation ?
Hi, Andy:
Thank you, I have ran successfully the stepping .model simulations. May I ask , do you have any idea of example of describing stepping subckt (what you have mentioned) , because I can't get it done. I have uploaded a file named '20181130_subckt_stepping_ng_FFSD08120A_2p.zip' at the temp folder.
I hae tried two syntax , but it shows 'unknown subcircuit call'': 1). .subckt 1 ako:FFSD08120A_2p ;the existing FFSD08120A_2p subckt now also known as "1" .subckt 2 ako:FFSD10120A_2p ;the existing FFSD10120A_2p subckt now also known as "2"
2). .model 1 ako:FFSD08120A_2p ;the existing FFSD08120A_2p subckt now also known as "1" .model 2 ako:FFSD10120A_2p ;the existing FFSD10120A_2p subckt now also known as "2"
By the way, another question is, the mentioned 'batch' idea of "dynamically-changing-the-parts-location, etc." before, could you shed some possible ways , if I hope to simplify those configurations of 'topologies' in a simplified 'table' which contain the info of what's set & what's unset, the hierarchy of those .model , subckt in LTspice , what's the best looking can it be as clear as possible for easy-reading.
Thank you very much.
Have a nice day! ---In LTspice@..., <ai.egrps@...> wrote : LTspice has a limited ability to .STEP through different models for the same part.? But it's somewhat risky.
You can use .STEP to change a transistor's (or diode's) .MODEL, if you define those .MODELs with numeric names: ? ? .MODEL 1 NPN (...)
? ? .MODEL 2 NPN (...) and so on.
The same thing SOMETIMES works for subcircuits too, if you're careful, using numeric subcircuit names.? However, if the subcircuits differ in a substantial way, then it fails, without warning.? I believe the problem is that LTspice reserves memory for the network's matrix once, and uses the same memory space for all .STEPped runs.? So if the subcircuits use a different amount of memory, or structure it differently, LTspice may end up walking all over its own memory and it corrupts the data.
I think it is much safer to either run consecutive simulations (each with their own schematic or netlist), or combine circuits into the same schematic.? You make it sound like combining circuits is very inefficient.? Often it is not.? Don't dismiss it if it may work.
Regards, Andy
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Re: Problem with inserting components and drawing wires
Update: The Nov. 29 2018 release fixes this problem. Thanks!
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Re: Is it possible to dynamically change a part's location in one simulation ?
re: "Does this sound reasonable ?"
I'm sorry, but I don't understand what you wrote (in the paragraph before the question).
Andy
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Re: Is it possible to dynamically change a part's location in one simulation ?
ericsson.sunshine wrote:
? ? "About the efficieny, I didn't mean affecting the application of the simulation for, I simply meant the 'spent time' of accomplishing the simulation(s)."
That is what I meant too.
Sometimes combining a few circuits in the same LTspice simulations makes it very slow, but sometime it doesn't.? If 3 circuits in the same schematic page make LTspice run 3 times slower than each one alone, then it is not worse than having 3 separate schematics and running them one-by-one.
Andy
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Re: Is it possible to dynamically change a part's location in one simulation ?
ericsson.sunshine, don't be misled by what you saw in the Help, which (BY COINCIDENCE) has both ".STEP" and "NPN" in the same command line.? That one is a very special case of the .STEP command.
For more about stepping .MODELs themselves, see this:
? ?
but even that might be confusing because it combines stepping a model, with the "AKO" syntax. ?Here are examples of stepping a model, without AKO:
? ? .model 2222 NPN (IS=1E-14 VAF=100 BF=200 IKF=0.3 XTB=1.5 BR=3 ...)
? ? .model 3904 NPN (IS=1E-14 VAF=100 Bf=300 IKF=0.4 XTB=1.5 BR=4 ...)
? ? .model ?849 NPN (IS=5.8591E-13 NF=0.9919 BF=230 IKF=18 VAF=90 ...)
? ? .model 1048 NPN (Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 Bf=495 Ne=1.28 ...)
? ? .step param BJT?list 2222 3904 849 1048
or this:
? ? .model 1 NMOS (Vto=0.8 Kp=48u Gamma=0.30 Phi=0.55 Lambda=0 Cgso=0 Cgdo=0 Cj=0 Cjsw=0 Tox=18u Ld=0)
? ? .model 2 NMOS (LEVEL=2 L=1u W=1u VTO=-1.44 KP=8.64E-6 NSUB=1E17 TOX=20n)
? ? .model 3 NMOS (KP=90u VT0=0.7 LAMBDA=0.01)
? ? .model 4 NMOS (VTO=0.4 KP=432E-6 GAMMA=0.2 PHI=.88)
? ? .step param MyMOS?list 1 2 3 4
Then you would have an NPN transistor symbol with the name changed to {BJT}, or an NMOS transistor symbol with the name changed to {myMOS}.? When the simulation runs, LTspice replaces that name with the number(s) from the .STEP command, which makes LTspice choose the appropriate .MODEL?for that transistor.
Because LTspice already has several .MODEL statements for transistors in its library, and more that can be downloaded from the Internet, it is convenient to not have to modify them so that their model names are strictly numeric.? That's when the "AKO" syntax comes in handy.? But it's not really necessary.
Regards,
Andy
On Thu, Nov 29, 2018 at 8:21 PM ericsson.sunshine@... [LTspice] < LTspice@...> wrote: > > > > Hi, Andy: > > Thank you for the answering. > > About the .STEP & .MODEL 1 NPN(...) , may I ask if there is any example already ? I could understand the '.MODEL1 NPN(...)' syntax in standard.bjt, but I don't understand how to parse it in .STEP, in the help, I saw: > > Example: .step NPN 2N2222(VAF) 50 100 25 > > Step NPN model parameter VAF from 50 to 100 in steps of 25. > > > But I think this only change the value of VAF , one attribute of 2N2222, how to change the whole model configuration ? The syntax for '.STEP xxx ...' is ? > > I think maybe, could defaultly put many components similar to FPGA cells, then configure them set or unset, by normal or high/low impedance, etc. (Still ideas). > > About the efficieny, I didn't mean affecting the application of the simulation for, I simply meant the 'spent time' of accomplishing the simulation(s). Therefore, it should represent the efficiency of user's working. Sorry for the unclear description. > > Have a nice day! > > > ---In LTspice@..., wrote : > > LTspice has a limited ability to .STEP through different models for the same part.? But it's somewhat risky. > > You can use .STEP to change a transistor's (or diode's) .MODEL, if you define those .MODELs with numeric names: > ? ? .MODEL 1 NPN (...) > ? ? .MODEL 2 NPN (...) > and so on. > > The same thing SOMETIMES works for subcircuits too, if you're careful, using numeric subcircuit names.? However, if the subcircuits differ in a substantial way, then it fails, without warning.? I believe the problem is that LTspice reserves memory for the network's matrix once, and uses the same memory space for all .STEPped runs.? So if the subcircuits use a different amount of memory, or structure it differently, LTspice may end up walking all over its own memory and it corrupts the data. > > I think it is much safer to either run consecutive simulations (each with their own schematic or netlist), or combine circuits into the same schematic.? You make it sound like combining circuits is very inefficient.? Often it is not.? Don't dismiss it if it may work. > > Regards, > Andy > > > > >
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Re: Is it possible to dynamically change a part's location in one simulation ?
You know, if the computer resource is enough,?
I think maybe I could build the default of every possible architecture of the circuit topology in a single schematic, though at every single .STEP, mainly could only one main core (one topology in default setting many topologies schematic) in action (running simulation), but the others just only sink a little bit losses which could still sustain their presence in the schematic, while in the next .STEP, they will present their work, the meaning is they co-exist, and live, but need enough resource to sustain (wait) to the next .STEP, in the mean while, they have the same goal, to achieve the final application of the schematic for, server the customers.
Does this sound reasonable ?
Best regards. ---In LTspice@..., <ericsson.sunshine@...> wrote : Hi, Andy:
Thank you for the answering.
About the .STEP & .MODEL 1 NPN(...) , may I ask if there is any example already ? I could understand the '.MODEL1 NPN(...)' syntax in standard.bjt, but I don't understand how to parse it in .STEP, in the help, I saw:
Example: .step NPN 2N2222(VAF) 50 100 25 Step NPN model parameter VAF from 50 to 100 in
steps of 25.
But I think this only change the value of VAF , one attribute of 2N2222, how to change the whole model configuration ? The syntax for '.STEP xxx ...' is ?
I think maybe, could defaultly put many components similar to FPGA cells, then configure them set or unset, by normal or high/low impedance, etc. (Still ideas).
About the efficieny, I didn't mean affecting the application of the simulation for, I simply meant the 'spent time' of accomplishing the simulation(s). Therefore, it should represent the efficiency of user's working. Sorry for the unclear description.
Have a nice day! ---In LTspice@..., <ai.egrps@...> wrote : LTspice has a limited ability to .STEP through different models for the same part.? But it's somewhat risky.
You can use .STEP to change a transistor's (or diode's) .MODEL, if you define those .MODELs with numeric names: ? ? .MODEL 1 NPN (...)
? ? .MODEL 2 NPN (...) and so on.
The same thing SOMETIMES works for subcircuits too, if you're careful, using numeric subcircuit names.? However, if the subcircuits differ in a substantial way, then it fails, without warning.? I believe the problem is that LTspice reserves memory for the network's matrix once, and uses the same memory space for all .STEPped runs.? So if the subcircuits use a different amount of memory, or structure it differently, LTspice may end up walking all over its own memory and it corrupts the data.
I think it is much safer to either run consecutive simulations (each with their own schematic or netlist), or combine circuits into the same schematic.? You make it sound like combining circuits is very inefficient.? Often it is not.? Don't dismiss it if it may work.
Regards, Andy
|
Re: Is it possible to dynamically change a part's location in one simulation ?
Hi, Andy:
Thank you for the answering.
About the .STEP & .MODEL 1 NPN(...) , may I ask if there is any example already ? I could understand the '.MODEL1 NPN(...)' syntax in standard.bjt, but I don't understand how to parse it in .STEP, in the help, I saw:
Example: .step NPN 2N2222(VAF) 50 100 25
Step NPN model parameter VAF from 50 to 100 in
steps of 25.
But I think this only change the value of VAF , one attribute of 2N2222, how to change the whole model configuration ? The syntax for '.STEP xxx ...' is ?
I think maybe, could defaultly put many components similar to FPGA cells, then configure them set or unset, by normal or high/low impedance, etc. (Still ideas).
About the efficieny, I didn't mean affecting the application of the simulation for, I simply meant the 'spent time' of accomplishing the simulation(s). Therefore, it should represent the efficiency of user's working. Sorry for the unclear description.
Have a nice day! ---In LTspice@..., <ai.egrps@...> wrote : LTspice has a limited ability to .STEP through different models for the same part.? But it's somewhat risky.
You can use .STEP to change a transistor's (or diode's) .MODEL, if you define those .MODELs with numeric names: ? ? .MODEL 1 NPN (...)
? ? .MODEL 2 NPN (...) and so on.
The same thing SOMETIMES works for subcircuits too, if you're careful, using numeric subcircuit names.? However, if the subcircuits differ in a substantial way, then it fails, without warning.? I believe the problem is that LTspice reserves memory for the network's matrix once, and uses the same memory space for all .STEPped runs.? So if the subcircuits use a different amount of memory, or structure it differently, LTspice may end up walking all over its own memory and it corrupts the data.
I think it is much safer to either run consecutive simulations (each with their own schematic or netlist), or combine circuits into the same schematic.? You make it sound like combining circuits is very inefficient.? Often it is not.? Don't dismiss it if it may work.
Regards, Andy
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Re: FFT in LTspice Mac version
Hello,
There is a new version of MAC-LTspice. The FFT is working again. Please update.
Control Panel -> Operation -> Software Update
Best regards, Helmut
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Hello eT,
Thanks a lot for correcting this model.
Could you please make a new folder "CD4047 new" in the hyperlinked Files-section below and upload your zip-file in this new folder.If you have any other/better idea, please let me know.
CD4047 new
Best regards, Helmut
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Hi
I've uploaded a CD4047B circuit (originally downloaded from this groups files section) with some adjustments to the symbol attributes. Some attributes were incorrect and would produce errors.
eT
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Re: timestep size effect (surprising?)
Hello John,
Yes I have used the default SPICE-settings in the Control Panel.
What we get is a
discharge with the R*C time constant of 100ns. The average is 20uV. The
low value is about 12uV, but this is the correct value from math too.
Difference between high and low
upp = 2fs*1A/100p = 20uV?
? I think LTspice is great, because it achieves this precision even with these extremely short pulses.
Best regards, Helmut ?
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Re: timestep size effect (surprising?)
It's your _pulse charge accumulation.asc
completely unchanged, and LTspiceXVII is at all default settings
Best wishes
John Woodgate OOO-Own Opinions Only
J M Woodgate and Associates
Rayleigh, Essex UK
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Show quoted text
?
Hello John,
Please upload your schematic wich shows bad results in
your opinion.
Best regards,
Helmut
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Re: timestep size effect (surprising?)
Hello John,
Please upload your schematic wich shows bad results in your opinion.
Best regards, Helmut
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Re: timestep size effect (surprising?)
I don't want to spread the problem all over
the list. I sent Helmut a screenshot by private email, and you
can have it too, if you want.
Best wishes
John Woodgate OOO-Own Opinions Only
J M Woodgate and Associates
Rayleigh, Essex UK
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?
I meant
to say, Helmut is correct about the original problem
that Eamon had.
It's not
clear to me what's happening with John's case with 400
pulses.
Narrowing
the Maximum Timestep does help, somewhat.? So does
tightening some of the SPICE *TOL options (reltol,
trtol).
I don't
know what you mean about a 12uV DC offset.
Andy
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Re: timestep size effect (surprising?)
I have not said that Helmut is wrong, but if
you don't set N and simulate for longer, even with
.plotwinsize=0, you (or at least I ) get very strange results.
Best wishes
John Woodgate OOO-Own Opinions Only
J M Woodgate and Associates
Rayleigh, Essex UK
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?
Helmut
is correct.? The unexpected behavior is due to LTspice's
waveform viewer trying to "connect the dots" using
curves, and when it does that, the trace appears to go
negative.
If you
take the original simulation (without "plotwinsize=0")
and right-click > View > Mark Data Points, you'll
see that the actual data points don't go negative (*).?
But the curve LTspice draws between the dots does swing
negative.? Note that LTspice doesn't use a linear
interpolation between points.? It uses curves.? If it
used only linear interpolation, it would have avoided
the problem of swinging negative, but it makes things
look somewhat "ragged" so the curves are preferred.
(*)?
Actually, one of the savedpoints did go negative, just a
little, but I think that is another artifact of
LTspice's waveform compression algorithm.? LTspice does
not only discard waveform points it doesn't need, it
apparently also modifies the values that it stores at
the points that it keeps.? This was news to me.
Regards,
Andy
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Re: timestep size effect (surprising?)
I meant to say, Helmut is correct about the original problem that Eamon had.
It's not clear to me what's happening with John's case with 400 pulses.
Narrowing the Maximum Timestep does help, somewhat.? So does tightening some of the SPICE *TOL options (reltol, trtol).
I don't know what you mean about a 12uV DC offset.
Andy
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Re: timestep size effect (surprising?)
Helmut is correct.? The unexpected behavior is due to LTspice's waveform viewer trying to "connect the dots" using curves, and when it does that, the trace appears to go negative.
If you take the original simulation (without "plotwinsize=0") and right-click > View > Mark Data Points, you'll see that the actual data points don't go negative (*).? But the curve LTspice draws between the dots does swing negative.? Note that LTspice doesn't use a linear interpolation between points.? It uses curves.? If it used only linear interpolation, it would have avoided the problem of swinging negative, but it makes things look somewhat "ragged" so the curves are preferred.
(*)? Actually, one of the savedpoints did go negative, just a little, but I think that is another artifact of LTspice's waveform compression algorithm.? LTspice does not only discard waveform points it doesn't need, it apparently also modifies the values that it stores at the points that it keeps.? This was news to me.
Regards,
Andy
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Hi Andy, Thanks again. I think I did that so far on the mc34072 and it worked. Best regards, Eric Sent from my Huawei Mobile
-------- Original Message -------- Subject: Re: [LTspice] 74hc_v.lib file From: "Andy ai.egrps@... [LTspice]" To: "[LTspice] group" CC:
?
Eric wrote:
? ? "I'm not sure how the symbols on the sym directory will be able to locate their matching?? ? ? ?.lib models in the sub directory."
By filename.? If a symbol is supposed to automatically include a model file, it does that by having the filename in one of its attributes.? As long as a file with that filename exists in either the lib\sub directory, or in the directory that has your schematic, then LTspice loads it.
To see a symbol's attributes, open the symbol file in LTspice and press Ctrl-A.
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John Woodgate