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the link for ltsputil is invalid. Can you give me another working link?

I'm running a simulation with a parameter to optimise, so I use a "step" command and then ".measure" to look at the calculated value as the step variable changes in the spice error log which shows a

to 20Vpk. As a PWM should work, true, I was only asking because at 100% you risk skipping a "beat", if not more; at the very least the pulses would be so narrow the eventual dead-time would swallow

In message <mpvsvf+1117m9h@...>, dated Thu, 6 Aug 2015, "luyuplus@... [LTspice]" <LTspice@...> writes: This is an example of the very general principle 'Maximum Power

Hello Helmut, Thanks a lot for your kind help. According to your guidance, I read the datasheet again and found that "the output power increases until it peaks when the operating voltage is at about

Hello, They either did their own measurement or they made a rough interpolation while not running at the optimum natural frequency of 35Hz. Pmax= (V/2)^2/R = (24/2)^2/119k = 1.2mW This maximum power

Dear all, Could you please help me with the model of the Mide V25W(Piezoelectric harvester) in LTspice IV software? The model used for the Mide V22BL(piezoelectric energy harvester) is a sine wave

The resistors are just a convenient place to connect to the comparator. I could have also used zero volt battery in series with comparator. It doesn't really matter. So I can make a logical connection

The suggestion for the switches (negative Vh) is good, but why would you want to use clunky behavioural expressions (with useless resistors since they are voltage sources) with cumbersome

A few more thoughts, which might or might not help.... I see that you STILL did not remove the .ENDS line that shouldn't be there. Are you aware of what I've been talking about? The shorted

".options cshunt=1pf cshuntintern =1p" If I remember right, a cshunt value that is this large, could be a problem too. But each case is different. Whenever adding that much extra capacitance to every

Yep, it does. There's more to it though - I just haven't shown anyone yet. My earliest question was getting the noise floor lower, and I thought the comparator was the problem. This circuit shows all

Gene, The circuit you sent seems to simulate ok. I will make three suggestions to improve convergence. 1) In the comparator you use BV sources.. This is bad news. Replace them by BI sources terminated

Gene, As I'm sure you know, adding any kind of either a delay or a sampling process, adds phase shift, which can easily make a stable system go unstable. It's good to see that you tried replacing the

oops - there's a text mistake in the file. Where it says "This triangle generator drives the non-inverting comparator input", I meant the "inverting" terminal.

I just uploaded a very basic class-D circuit (gg_class-D_2015-08-05_1512.zip). You'll see how I modeled the comparator and the output driver. What's missing from this diagram is all the feedback stuff

I also tried the lossless tline (forgot to mention it). Same exact problem - the sim blew up.

@Gene Do NOT use a B-source with delay() as you will most likely invent new curses. If it's a comparator with a delay you need, the most "linearized" model I could find was a G-source + Tline + output

Ok I corrected the RTD to RTD2 in all the statements and then reran the sim. I am getting about -44dbm at mmRFOUT now and the 3rd harmonic at around 1200 MHz is the same strength or larger than the

In message <mpte1f+1hso2ao@...>, dated Wed, 5 Aug 2015, "wms121@... [LTspice]" <LTspice@...> writes: Would you please consider always uploading a zip archive containing