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Date

Ctrl_r to rotate an inductor

Sam Jesse
 

Hi

What effect to inductor/transformer building does Ctrl_r mean in the physical sense?
In the example of Files/Temp/ transformer.asc
L1, L2 and L3. how can I build this home transformer project to "play" with?i.e. how to wind it to match the LTspice design?

Thank you


Re: slow IGBT Simulation problem

 

sunder,

The model is not well behaved, but it does work.? Note that the link you gave says to use the alternate solver.? Sometimes this solver can handle bad models that the normal solver has trouble with.? This is one of them.

Rick


slow IGBT Simulation problem

 

Hi Fellows,

Hope all are doing well. ?I am trying to simulate basic igbt switching cercuit ( not yet with any specific model) so i found a basic circuit in file session of this group. It worked but its very slow after half of the pulse duration it seems as it stopped even after waiting ? it doesnot proceed much. My question is that how to make simulation faster in this case? does simulating igbt is time consuming as it appear? I am not very experienced with ltspice, please guide if i am wrong somewhere or i am doing any silly mistake in setting transient parameter....


For your reference link of files that i used from this group is given.




Re: LM2917 F/V Tachometer simulation problem

 

Hi


I've been working on this since?the post your referring to went to the wrong group...:-/


Anyway...

I was able to get?the macro model?working. I was about to ask someone if they could test the model when I noticed your post. Thanks for the follow-up.


"The circuit, taken right out of Figure 14 in National Semi's Applications Note AN-162, is peculiar because the on-chip "ground" (VSS?) pin is not grounded. ?It is connected to a point that is nominally half-way between power and actual ground. ?That means some of the signal pins are well below on-chip VSS. ?Usually the on-chip VSS is the substrate, and nothing should ever be more negative than that. ?It just doesn't seem right."


Yup, the schematic is a little unclear. There actually is a ground input on the schematic.

Its Pin 12 shown in the BIAS section. All ground points on the schematic should be tied together and connected to?Pin 12. Pin?12 then should be grounded externally in the application circuit.?


"In addition, there might be problems with the IC model too, in spite of the fact that it looks like a faithful replica of their Figure 2. ?The on-chip regulator is a few volts off. ?The input pin has a 10K series resistor, which seems to prevent the input from noticing zero-crossings (i.e., it's impossible to bring pin 1 low enough to ever toggle the Schmitt trigger ... so it never sees any AC input!). ?There may be issues with mismatch between diodes and transistors, which prevents some transistors from ever turning on. ?Those are the problems I saw so far


I can see nothing happening in the Charge Pump. ?Its input seems to be forever stuck high. ?The problem starts in the input hysteresis amplifier"


In the description of the Hysteresis Amplifier, I noticed this statement:


"D4 and Q7 are identical geometry devices, so
that the resistor causes Q7 to be biased at a higher level
than D4."


What I did here is replace all diodes in the schematic, except the zener of course, with transistors. Once I did that, everything started working...:-). The?circuit output values all seem to match values expected using the equations on the data sheet.


"I have a strong suspicion that Figure 14 might not actually work"


I haven't tried this yet with the new changes but I will.


Can someone check the new LM2917 component?


eT


Re: Fluorescent lamp model F40WW

John Woodgate
 

In message <llt5bp+foraj9@...>, dated Sun, 25 May 2014, "helmutsennewald@... [LTspice]" <LTspice@...> writes:

I wonder which schematic you use.

The example F40WW.asc from the Files section doesn't need any extra file.


/Flourescent%20Lamp/
That's a 'flourescent' lamp -you can see the flour on the inside of the tube! (;-)
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
Nondum ex silvis sumus
John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK


Re: Fluorescent lamp model F40WW

 

Hello,

I wonder which schematic you use.

The example F40WW.asc from the Files section doesn't need any extra file.



What is the source of your example(schematic)?

Best regards,
Helmut

?


Fluorescent lamp model F40WW

 

in the Fluorescent lamp model F40WW


Can't find " p_smcj30.lib" in the include statement on the schematic and what is it?

?


Re: plotting the difference of voltages

John Woodgate
 

In message <llsfp5+1ji152k@...>, dated Sun, 25 May 2014, "helmutsennewald@... [LTspice]" <LTspice@...> writes:

A transformer can only transport AC voltage and current.
This is, of course, true if you wait long enough, but it can be surprising how long a transformer passes an unsymmetrical signal.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
Nondum ex silvis sumus
John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK


Re: plotting the difference of voltages

 

Hello Sam,

A transformer can only transport AC voltage and current. Thus the overall DC(average) voltage and current is always zero on the secondary side.

Best regards,
Helmut


Re: plotting the difference of voltages

John Woodgate
 

In message <CAK-wn_46VVk4kRHPLiArsHmsDFgdzV=ec+1xnWs1oo86_Q29oA@...>, dated Sun, 25 May 2014, "Sam Jesse revrvr@... [LTspice]" <LTspice@...> writes:

In Files/Temp/ transformer.asc
Please help me understand why V(Out_1,Out_2) is going to negative numbers, I expected to see it from zero to 40v and back to zero, since plotting V Out_1 looks like a mirror of V Out_2.
You can easily see that V1 is sometimes a positive voltage and at other times a negative voltage, while V2 is opposite. So (V1-V2) is sometimes a positive number and sometimes a negative number.

Think about the 'number line', which has zero in the middle, positive numbers going off to the right and negative numbers going off to the left. Then consider adding +3 to -2 and subtracting, first +4 from +2 and then +2 from -3.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
Nondum ex silvis sumus
John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK


plotting the difference of voltages

Sam Jesse
 

Hi

In Files/Temp/ transformer.asc
Please help me understand why V(Out_1,Out_2) is going to negative numbers, I expected to see it from zero to 40v and back to zero, since plotting V Out_1 looks like a mirror of V Out_2.



Thank you


Re: Analog multiplier - wrong simulation or flaw in the circuit?

 

You hit the nail again, Helmut.

Gracias!!


Re: SMPS switching losses in LTspice?

 

The lack of such information suggests that the transistor might not be a good choice for this use.

Jim Wagner
Oregon Research Electronics

On May 24, 2014, at 4:51 PM, sawreyrw@... [LTspice] wrote:

?

potrstuvich,

The data sheet specifies the gate drive voltage, Rg, Id and Vds.? A MOSFET is almost always specified with an inductive load which means the load current is essentially constant during switching.? Therefore, your test circuit should use Rg and Vg in the gate and a current source connected to the drain.? The drain voltage should be clamped to a maximum voltage of the Vds spec.?

Regarding Cgd in the model, you should be able to get a sense of whether the model is reasonable given the data sheet value.? Someone else suggest you should also look at the Qgs spec, and I agree.

The net net is that you can build a test circuit to get a reasonable engineering estimate of the "goodness" of the model.

Rick



Re: SMPS switching losses in LTspice?

 

potrstuvich,

The data sheet specifies the gate drive voltage, Rg, Id and Vds.? A MOSFET is almost always specified with an inductive load which means the load current is essentially constant during switching.? Therefore, your test circuit should use Rg and Vg in the gate and a current source connected to the drain.? The drain voltage should be clamped to a maximum voltage of the Vds spec.?

Regarding Cgd in the model, you should be able to get a sense of whether the model is reasonable given the data sheet value.? Someone else suggest you should also look at the Qgs spec, and I agree.

The net net is that you can build a test circuit to get a reasonable engineering estimate of the "goodness" of the model.

Rick


Re: SMPS switching losses in LTspice?

 


the mosfet I amusing in LTspice is

BSC159N10.

its datasheet gives no switching tests with which I can simulate and compare.

So there is no way of me knowing whether or not the 1.07W of switching loss I get for this model is accurate.

This fet is the one provided by the ltspice program.

If you click it, the model just says cgd(min) = 15p and c(gd)max = 450p.

?

I am going to have to conclude that I don't know whether or not the switching losses in ltspice for this particular model are accurate enough.

I understand? that ltspice is capable of doing this, but don't know how to write the model statement for that BSC fet, and dont know how to analyse the model statement for the fet in the ltspice program.


Re: Analog multiplier - wrong simulation or flaw in the circuit?

 

Hello Augustinto,

There are two problems in your circuit.

1. The offset adjust circuit only works with a very few hundred milli Volts. See my test circuit.



2. Your Opamps require a feedback capacitor of a few ten pico Farads.


The folder with the circuits:

?

It's also very important to use matched transistors.

1. Use matched quad transistors! MAT04, MAT14, THAT300, 2nd choice CA3046, CA3086, CA3127
2. Don't forget decoupling capacitors of > 0.1uF from +V to GND and -V to GND and a real circuit!

Best regards,
Helmut


Re: SMPS switching losses in LTspice?

 

You can get some idea of the accuracy by examining the Vgs during the switching interval. If Qg is similar to the datasheet, then Cdg is correctly included.
Losses in capacitance will also reflect in the power loss of the driving element and series limiters.

RL


Analog multiplier - wrong simulation or flaw in the circuit?

 

I run across the schematic shown in page 13 of the RC4136's datasheet (uploaded). After 3 days trying to have it "working" in LTSpice (uploaded) I realized I need help.?

I tend to think I know the basics of log / antilog amps and I understand this circuit would give (hopefully) a Vout = Vy * Vx / Vz. Instead, the prevailing result I get is Vout slightly above Vx, no matter what Vy or Vz are.?

With different op amps, or no matter how many diodes I pile up at the top (to get up to around 3.5V) to polarize the first stages, I always get a result not even close to the expected (and most of the times with >1 MHz noise riding the output).?

I am puzzled by what is wrong: my simulation or the circuit??


Sorry but I am not sure if I uploaded both files (RC4136 datasheet and Analog mutiplier 03.asc in the right place)



Re: I can not find the file "Zip-files with all files from this group"

 

Hello Cristian,

The zip-files are in the Yahoo group LTspiceFiles. See the link below.




?

Best regards,
Helmut

?


I can not find the file "Zip-files with all files from this group"

 

I can not download the file " Zip-files with all files from this group".
Any help is welcome . Best regards Cristian